From 9aed8fb43441228343b925b42464a55042c47ca0 Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Wed, 17 Nov 2021 13:16:45 +0000 Subject: IVGCVSW-6040 Update 21.11 Doxygen Documents Signed-off-by: Nikhil Raj Change-Id: Ia36ec98c4bebc27a69103911ea3409cd7db587a5 --- 21.11/_ref_gather_workload_8cpp_source.xhtml | 136 +++++++++++++++++++++++++++ 1 file changed, 136 insertions(+) create mode 100644 21.11/_ref_gather_workload_8cpp_source.xhtml (limited to '21.11/_ref_gather_workload_8cpp_source.xhtml') diff --git a/21.11/_ref_gather_workload_8cpp_source.xhtml b/21.11/_ref_gather_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..018df4b73d --- /dev/null +++ b/21.11/_ref_gather_workload_8cpp_source.xhtml @@ -0,0 +1,136 @@ + + + + + + + + + + + + + +ArmNN: src/backends/reference/workloads/RefGatherWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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RefGatherWorkload.cpp
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+Go to the documentation of this file.
1 //
2 // Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "RefGatherWorkload.hpp"
7 
8 #include "Gather.hpp"
9 #include "Profiling.hpp"
10 #include "RefWorkloadUtils.hpp"
11 #include <ResolveType.hpp>
12 
13 namespace armnn
14 {
15 
16 void RefGatherWorkload::Execute() const
17 {
18  Execute(m_Data.m_Inputs, m_Data.m_Outputs);
19 }
20 
21 void RefGatherWorkload::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor)
22 {
23  Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs);
24 }
25 
26 void RefGatherWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
27 {
28  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefGatherWorkload_Execute");
29 
30  const TensorInfo& inputInfo0 = GetTensorInfo(inputs[0]);
31  const TensorInfo& inputInfo1 = GetTensorInfo(inputs[1]);
32  const TensorInfo& outputInfo = GetTensorInfo(outputs[0]);
33 
34  std::unique_ptr<Decoder<float>> decoderPtr = MakeDecoder<float>(inputInfo0, inputs[0]->Map());
35  Decoder<float>& decoder = *decoderPtr;
36 
37  const int32_t* indicesData = reinterpret_cast<int32_t*>(inputs[1]->Map());
38 
39  std::unique_ptr<Encoder<float>> encoderPtr = MakeEncoder<float>(outputInfo, outputs[0]->Map());
40  Encoder<float>& encoder = *encoderPtr;
41 
42  Gather(inputInfo0, inputInfo1, outputInfo, decoder, indicesData, encoder, m_Data.m_Parameters.m_Axis);
43 }
44 
45 } //namespace armnn
armnn::Compute::CpuRef
CPU Execution: Reference C++ kernels.
+
RefWorkloadUtils.hpp
+ + +
ResolveType.hpp
+
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
+ +
ARMNN_SCOPED_PROFILING_EVENT
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
+ + +
armnn::RefGatherWorkload::Execute
void Execute() const override
Definition: RefGatherWorkload.cpp:16
+ + +
Gather.hpp
+
RefGatherWorkload.hpp
+
armnn::GatherDescriptor::m_Axis
int32_t m_Axis
The axis in params to gather indices from.
Definition: Descriptors.hpp:833
+
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:31
+ +
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:30
+
armnn::GetTensorInfo
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
Definition: RefWorkloadUtils.hpp:26
+
Profiling.hpp
+
armnn::RefGatherWorkload::ExecuteAsync
void ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) override
Definition: RefGatherWorkload.cpp:21
+ +
+
+ + + + -- cgit v1.2.1