From fd627ffaec8fd8801d980b4c91ee7c0607ab6aaf Mon Sep 17 00:00:00 2001 From: Jan Eilers Date: Thu, 25 Feb 2021 17:44:00 +0000 Subject: IVGCVSW-5687 Update Doxygen Docu * Update Doxygen Documentation for 21.02 release Signed-off-by: Jan Eilers Change-Id: I9ed2f9caab038836ea99d7b378d7899fe431a4e5 --- 21.02/_ref_constant_workload_8cpp_source.xhtml | 135 +++++++++++++++++++++++++ 1 file changed, 135 insertions(+) create mode 100644 21.02/_ref_constant_workload_8cpp_source.xhtml (limited to '21.02/_ref_constant_workload_8cpp_source.xhtml') diff --git a/21.02/_ref_constant_workload_8cpp_source.xhtml b/21.02/_ref_constant_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..b4252d54b6 --- /dev/null +++ b/21.02/_ref_constant_workload_8cpp_source.xhtml @@ -0,0 +1,135 @@ + + + + + + + + + + + + + +ArmNN: src/backends/reference/workloads/RefConstantWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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RefConstantWorkload.cpp
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+Go to the documentation of this file.
1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "RefConstantWorkload.hpp"
7 
8 #include "RefWorkloadUtils.hpp"
9 
10 #include <armnn/Types.hpp>
11 
12 #include <armnn/utility/Assert.hpp>
13 
14 #include <cstring>
15 
16 namespace armnn
17 {
18 
19 RefConstantWorkload::RefConstantWorkload(
20  const ConstantQueueDescriptor& descriptor, const WorkloadInfo& info)
21  : BaseWorkload<ConstantQueueDescriptor>(descriptor, info) {}
22 
23 void RefConstantWorkload::PostAllocationConfigure()
24 {
25  const ConstantQueueDescriptor& data = this->m_Data;
26 
27  ARMNN_ASSERT(data.m_LayerOutput != nullptr);
28 
29  const TensorInfo& outputInfo = GetTensorInfo(data.m_Outputs[0]);
30  ARMNN_ASSERT(data.m_LayerOutput->GetTensorInfo().GetNumBytes() == outputInfo.GetNumBytes());
31 
32  memcpy(GetOutputTensorData<void>(0, data), data.m_LayerOutput->GetConstTensor<void>(),
33  outputInfo.GetNumBytes());
34 }
35 
36 void RefConstantWorkload::Execute() const
37 {
38  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefConstantWorkload_Execute");
39 }
40 
41 } //namespace armnn
armnn::Compute::CpuRef
CPU Execution: Reference C++ kernels.
+ +
RefWorkloadUtils.hpp
+ +
RefConstantWorkload.hpp
+
armnn::BaseWorkload< ConstantQueueDescriptor >::m_Data
const ConstantQueueDescriptor m_Data
Definition: Workload.hpp:46
+
armnn::TensorInfo::GetNumBytes
unsigned int GetNumBytes() const
Definition: Tensor.cpp:418
+
armnn::ConstantQueueDescriptor::m_LayerOutput
const ConstCpuTensorHandle * m_LayerOutput
Definition: WorkloadData.hpp:362
+
armnn::ConstCpuTensorHandle::GetConstTensor
const T * GetConstTensor() const
Definition: CpuTensorHandle.hpp:31
+
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_software_tools.dox:6
+
ARMNN_SCOPED_PROFILING_EVENT
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:173
+ + +
Types.hpp
+
ARMNN_ASSERT
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
+
armnn::RefConstantWorkload::Execute
virtual void Execute() const override
Definition: RefConstantWorkload.cpp:36
+
Assert.hpp
+
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:31
+
armnn::RefConstantWorkload::RefConstantWorkload
RefConstantWorkload(const ConstantQueueDescriptor &descriptor, const WorkloadInfo &info)
Definition: RefConstantWorkload.cpp:19
+
armnn::WorkloadInfo
Contains information about inputs and outputs to a layer.
Definition: WorkloadInfo.hpp:16
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armnn::GetTensorInfo
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
Definition: RefWorkloadUtils.hpp:26
+
armnn::ConstCpuTensorHandle::GetTensorInfo
const TensorInfo & GetTensorInfo() const
Definition: CpuTensorHandle.hpp:37
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