From fd627ffaec8fd8801d980b4c91ee7c0607ab6aaf Mon Sep 17 00:00:00 2001 From: Jan Eilers Date: Thu, 25 Feb 2021 17:44:00 +0000 Subject: IVGCVSW-5687 Update Doxygen Docu * Update Doxygen Documentation for 21.02 release Signed-off-by: Jan Eilers Change-Id: I9ed2f9caab038836ea99d7b378d7899fe431a4e5 --- 21.02/_cl_pooling2d_workload_8cpp_source.xhtml | 141 +++++++++++++++++++++++++ 1 file changed, 141 insertions(+) create mode 100644 21.02/_cl_pooling2d_workload_8cpp_source.xhtml (limited to '21.02/_cl_pooling2d_workload_8cpp_source.xhtml') diff --git a/21.02/_cl_pooling2d_workload_8cpp_source.xhtml b/21.02/_cl_pooling2d_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..2beec1c3b4 --- /dev/null +++ b/21.02/_cl_pooling2d_workload_8cpp_source.xhtml @@ -0,0 +1,141 @@ + + + + + + + + + + + + + +ArmNN: src/backends/cl/workloads/ClPooling2dWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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ClPooling2dWorkload.cpp
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+Go to the documentation of this file.
1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "ClPooling2dWorkload.hpp"
7 #include <cl/ClLayerSupport.hpp>
8 #include <cl/ClTensorHandle.hpp>
9 #include <aclCommon/ArmComputeUtils.hpp>
10 #include <aclCommon/ArmComputeTensorUtils.hpp>
11 
12 #include "ClWorkloadUtils.hpp"
13 
14 namespace armnn
15 {
16 using namespace armcomputetensorutils;
17 
18 arm_compute::Status ClPooling2dWorkloadValidate(const TensorInfo& input,
19  const TensorInfo& output,
20  const Pooling2dDescriptor& descriptor)
21 {
22  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
23  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
24 
25  arm_compute::PoolingLayerInfo layerInfo = BuildArmComputePoolingLayerInfo(descriptor);
26 
27  return arm_compute::CLPoolingLayer::validate(&aclInputInfo, &aclOutputInfo, layerInfo);
28 }
29 
30 ClPooling2dWorkload::ClPooling2dWorkload(
31  const Pooling2dQueueDescriptor& descriptor,
32  const WorkloadInfo& info,
33  const arm_compute::CLCompileContext& clCompileContext)
34  : BaseWorkload<Pooling2dQueueDescriptor>(descriptor, info)
35 {
36  m_Data.ValidateInputsOutputs("ClPooling2dWorkload", 1, 1);
37 
38  arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
39  arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
40 
41  arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout);
42  input.info()->set_data_layout(aclDataLayout);
43  output.info()->set_data_layout(aclDataLayout);
44 
45  // flag to use wider accumulators (32 bit instead of 16 for FP16) to improve accuracy
46  // enable fp_mixed_precision for the the FP16 cases that
47  // accumulation reaches a limit beyond which there is no more increment of the value
48  bool fpMixedPrecision = false;
49 
50  arm_compute::PoolingLayerInfo layerInfo = BuildArmComputePoolingLayerInfo(m_Data.m_Parameters, fpMixedPrecision);
51 
52  // Run the layer.
53  m_PoolingLayer.configure(clCompileContext, &input, &output, layerInfo);
54 }
55 
56 void ClPooling2dWorkload::Execute() const
57 {
58  ARMNN_SCOPED_PROFILING_EVENT_CL("ClPooling2dWorkload_Execute");
59  RunClFunction(m_PoolingLayer, CHECK_LOCATION());
60 }
61 
62 }
ClPooling2dWorkload.hpp
+
armnn::ClPooling2dWorkload::Execute
void Execute() const override
Definition: ClPooling2dWorkload.cpp:56
+
armnn::DataLayout
DataLayout
Definition: Types.hpp:50
+
ArmComputeUtils.hpp
+ +
ARMNN_SCOPED_PROFILING_EVENT_CL
#define ARMNN_SCOPED_PROFILING_EVENT_CL(name)
Definition: ClWorkloadUtils.hpp:20
+
armnn::RunClFunction
void RunClFunction(arm_compute::IFunction &function, const CheckLocation &location)
Definition: ClWorkloadUtils.hpp:134
+
armnn::BaseWorkload< Pooling2dQueueDescriptor >::m_Data
const Pooling2dQueueDescriptor m_Data
Definition: Workload.hpp:46
+
ArmComputeTensorUtils.hpp
+
armnn::QueueDescriptor::ValidateInputsOutputs
void ValidateInputsOutputs(const std::string &descName, unsigned int numExpectedIn, unsigned int numExpectedOut) const
Definition: WorkloadData.cpp:460
+
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_software_tools.dox:6
+ +
armnn::ClPooling2dWorkloadValidate
arm_compute::Status ClPooling2dWorkloadValidate(const TensorInfo &input, const TensorInfo &output, const Pooling2dDescriptor &descriptor)
Definition: ClPooling2dWorkload.cpp:18
+ +
armnn::Status
Status
enumeration
Definition: Types.hpp:26
+
CHECK_LOCATION
#define CHECK_LOCATION()
Definition: Exceptions.hpp:197
+
armnn::Pooling2dDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:385
+
ClTensorHandle.hpp
+
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:31
+ + +
armnn::WorkloadInfo
Contains information about inputs and outputs to a layer.
Definition: WorkloadInfo.hpp:16
+
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:30
+
armnn::ClPooling2dWorkload::ClPooling2dWorkload
ClPooling2dWorkload(const Pooling2dQueueDescriptor &descriptor, const WorkloadInfo &info, const arm_compute::CLCompileContext &clCompileContext)
Definition: ClPooling2dWorkload.cpp:30
+ +
armnn::Pooling2dDescriptor
A Pooling2dDescriptor for the Pooling2dLayer.
Definition: Descriptors.hpp:329
+
ClWorkloadUtils.hpp
+
ClLayerSupport.hpp
+
+
+ + + + -- cgit v1.2.1