From fd627ffaec8fd8801d980b4c91ee7c0607ab6aaf Mon Sep 17 00:00:00 2001 From: Jan Eilers Date: Thu, 25 Feb 2021 17:44:00 +0000 Subject: IVGCVSW-5687 Update Doxygen Docu * Update Doxygen Documentation for 21.02 release Signed-off-by: Jan Eilers Change-Id: I9ed2f9caab038836ea99d7b378d7899fe431a4e5 --- 21.02/_cl_minimum_workload_8cpp_source.xhtml | 138 +++++++++++++++++++++++++++ 1 file changed, 138 insertions(+) create mode 100644 21.02/_cl_minimum_workload_8cpp_source.xhtml (limited to '21.02/_cl_minimum_workload_8cpp_source.xhtml') diff --git a/21.02/_cl_minimum_workload_8cpp_source.xhtml b/21.02/_cl_minimum_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..d2f1a6c7a0 --- /dev/null +++ b/21.02/_cl_minimum_workload_8cpp_source.xhtml @@ -0,0 +1,138 @@ + + + + + + + + + + + + + +ArmNN: src/backends/cl/workloads/ClMinimumWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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ClMinimumWorkload.cpp
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+Go to the documentation of this file.
1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "ClMinimumWorkload.hpp"
7 
8 #include "ClWorkloadUtils.hpp"
9 
12 
14 
15 #include <cl/ClLayerSupport.hpp>
16 #include <cl/ClTensorHandle.hpp>
17 #include <cl/ClLayerSupport.hpp>
18 
19 namespace armnn
20 {
21 
22 using namespace armcomputetensorutils;
23 
25  const TensorInfo& input1,
26  const TensorInfo& output)
27 {
28  const arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0);
29  const arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1);
30  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
31 
32  const arm_compute::Status aclStatus = arm_compute::CLElementwiseMin::validate(&aclInput0Info,
33  &aclInput1Info,
34  &aclOutputInfo);
35 
36  return aclStatus;
37 }
38 
40  const WorkloadInfo& info,
41  const arm_compute::CLCompileContext& clCompileContext)
42  : BaseWorkload<MinimumQueueDescriptor>(descriptor, info)
43 {
44  m_Data.ValidateInputsOutputs("ClMinimumWorkload", 2, 1);
45 
46  arm_compute::ICLTensor& input0 = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
47  arm_compute::ICLTensor& input1 = static_cast<IClTensorHandle*>(m_Data.m_Inputs[1])->GetTensor();
48  arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
49 
50  m_MinimumLayer.configure(clCompileContext, &input0, &input1, &output);
51 }
52 
54 {
55  ARMNN_SCOPED_PROFILING_EVENT_CL("ClMinimumWorkload_Execute");
56  RunClFunction(m_MinimumLayer, CHECK_LOCATION());
57 }
58 
59 } //namespace armnn
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#define ARMNN_SCOPED_PROFILING_EVENT_CL(name)
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void RunClFunction(arm_compute::IFunction &function, const CheckLocation &location)
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ClMinimumWorkload(const MinimumQueueDescriptor &descriptor, const WorkloadInfo &info, const arm_compute::CLCompileContext &clCompileContext)
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const MinimumQueueDescriptor m_Data
Definition: Workload.hpp:46
+ +
void ValidateInputsOutputs(const std::string &descName, unsigned int numExpectedIn, unsigned int numExpectedOut) const
+ +
Copyright (c) 2021 ARM Limited and Contributors.
+
void Execute() const override
+ +
Status
enumeration
Definition: Types.hpp:26
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#define CHECK_LOCATION()
Definition: Exceptions.hpp:197
+ + +
std::vector< ITensorHandle * > m_Outputs
+ + +
arm_compute::Status ClMinimumWorkloadValidate(const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
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Contains information about inputs and outputs to a layer.
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std::vector< ITensorHandle * > m_Inputs
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