From fd627ffaec8fd8801d980b4c91ee7c0607ab6aaf Mon Sep 17 00:00:00 2001 From: Jan Eilers Date: Thu, 25 Feb 2021 17:44:00 +0000 Subject: IVGCVSW-5687 Update Doxygen Docu * Update Doxygen Documentation for 21.02 release Signed-off-by: Jan Eilers Change-Id: I9ed2f9caab038836ea99d7b378d7899fe431a4e5 --- ...cl_batch_to_space_nd_workload_8cpp_source.xhtml | 143 +++++++++++++++++++++ 1 file changed, 143 insertions(+) create mode 100644 21.02/_cl_batch_to_space_nd_workload_8cpp_source.xhtml (limited to '21.02/_cl_batch_to_space_nd_workload_8cpp_source.xhtml') diff --git a/21.02/_cl_batch_to_space_nd_workload_8cpp_source.xhtml b/21.02/_cl_batch_to_space_nd_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..7ce76579df --- /dev/null +++ b/21.02/_cl_batch_to_space_nd_workload_8cpp_source.xhtml @@ -0,0 +1,143 @@ + + + + + + + + + + + + + +ArmNN: src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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ClBatchToSpaceNdWorkload.cpp
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+Go to the documentation of this file.
1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "ClBatchToSpaceNdWorkload.hpp"
7 
8 #include <cl/ClTensorHandle.hpp>
9 #include <backendsCommon/CpuTensorHandle.hpp>
10 #include <aclCommon/ArmComputeTensorUtils.hpp>
11 
12 #include <armnn/utility/NumericCast.hpp>
13 
14 #include "ClWorkloadUtils.hpp"
15 
16 namespace armnn
17 {
18 using namespace armcomputetensorutils;
19 
20 ClBatchToSpaceNdWorkload::ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& desc,
21  const WorkloadInfo& info,
22  const arm_compute::CLCompileContext& clCompileContext)
23  : BaseWorkload<BatchToSpaceNdQueueDescriptor>(desc, info)
24 {
25  m_Data.ValidateInputsOutputs("ClBatchToSpaceNdWorkload", 1, 1);
26 
27  arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout);
28 
29  arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
30  input.info()->set_data_layout(aclDataLayout);
31 
32  // ArmNN blockShape is [H, W] Cl asks for W, H
33  int32_t blockHeight = armnn::numeric_cast<int32_t>(desc.m_Parameters.m_BlockShape[0]);
34  int32_t blockWidth = armnn::numeric_cast<int32_t>(desc.m_Parameters.m_BlockShape[1]);
35 
36  arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
37  output.info()->set_data_layout(aclDataLayout);
38 
39  m_Layer.configure(clCompileContext, &input, blockWidth, blockHeight, &output);
40 }
41 
42 void ClBatchToSpaceNdWorkload::Execute() const
43 {
44  ARMNN_SCOPED_PROFILING_EVENT_CL("ClBatchToSpaceNdWorkload_Execute");
45  RunClFunction(m_Layer, CHECK_LOCATION());
46 }
47 
48 arm_compute::Status ClBatchToSpaceNdWorkloadValidate(const TensorInfo& input,
49  const TensorInfo& output,
50  const BatchToSpaceNdDescriptor& desc) {
51  DataLayout dataLayout = desc.m_DataLayout;
52  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, dataLayout);
53 
54  // ArmNN blockShape is [H, W] Cl asks for W, H
55  int32_t blockHeight = armnn::numeric_cast<int32_t>(desc.m_BlockShape[0]);
56  int32_t blockWidth = armnn::numeric_cast<int32_t>(desc.m_BlockShape[1]);
57 
58  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, dataLayout);
59 
60  const arm_compute::Status aclStatus = arm_compute::CLBatchToSpaceLayer::validate(&aclInputInfo,
61  blockWidth,
62  blockHeight,
63  &aclOutputInfo);
64  return aclStatus;
65 }
66 
67 } //namespace armnn
ClBatchToSpaceNdWorkload.hpp
+
armnn::DataLayout
DataLayout
Definition: Types.hpp:50
+
armnn::ClBatchToSpaceNdWorkload::ClBatchToSpaceNdWorkload
ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor &descriptor, const WorkloadInfo &info, const arm_compute::CLCompileContext &clCompileContext)
Definition: ClBatchToSpaceNdWorkload.cpp:20
+
armnn::ClBatchToSpaceNdWorkloadValidate
arm_compute::Status ClBatchToSpaceNdWorkloadValidate(const TensorInfo &input, const TensorInfo &output, const BatchToSpaceNdDescriptor &desc)
Definition: ClBatchToSpaceNdWorkload.cpp:48
+ +
ARMNN_SCOPED_PROFILING_EVENT_CL
#define ARMNN_SCOPED_PROFILING_EVENT_CL(name)
Definition: ClWorkloadUtils.hpp:20
+
armnn::RunClFunction
void RunClFunction(arm_compute::IFunction &function, const CheckLocation &location)
Definition: ClWorkloadUtils.hpp:134
+
armnn::BaseWorkload< BatchToSpaceNdQueueDescriptor >::m_Data
const BatchToSpaceNdQueueDescriptor m_Data
Definition: Workload.hpp:46
+
armnn::BatchToSpaceNdDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:700
+
ArmComputeTensorUtils.hpp
+
armnn::QueueDescriptor::ValidateInputsOutputs
void ValidateInputsOutputs(const std::string &descName, unsigned int numExpectedIn, unsigned int numExpectedOut) const
Definition: WorkloadData.cpp:460
+
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_software_tools.dox:6
+ + +
armnn::BatchToSpaceNdDescriptor
A BatchToSpaceNdDescriptor for the BatchToSpaceNdLayer.
Definition: Descriptors.hpp:673
+
NumericCast.hpp
+ +
armnn::BatchToSpaceNdDescriptor::m_BlockShape
std::vector< unsigned int > m_BlockShape
Block shape values.
Definition: Descriptors.hpp:696
+
armnn::Status
Status
enumeration
Definition: Types.hpp:26
+
CHECK_LOCATION
#define CHECK_LOCATION()
Definition: Exceptions.hpp:197
+
CpuTensorHandle.hpp
+ +
ClTensorHandle.hpp
+
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:31
+ + +
armnn::numeric_cast
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35
+
armnn::WorkloadInfo
Contains information about inputs and outputs to a layer.
Definition: WorkloadInfo.hpp:16
+
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:30
+
ClWorkloadUtils.hpp
+
+
+ + + + -- cgit v1.2.1