From 6940dd720ebb6b3d1df8ca203ab696daefe58189 Mon Sep 17 00:00:00 2001 From: Jim Flynn Date: Fri, 20 Mar 2020 12:25:56 +0000 Subject: renamed Documentation folder 20.02 and added .nojekyll file Signed-off-by: Jim Flynn --- 20.02/_cl_addition_workload_8cpp_source.xhtml | 136 ++++++++++++++++++++++++++ 1 file changed, 136 insertions(+) create mode 100644 20.02/_cl_addition_workload_8cpp_source.xhtml (limited to '20.02/_cl_addition_workload_8cpp_source.xhtml') diff --git a/20.02/_cl_addition_workload_8cpp_source.xhtml b/20.02/_cl_addition_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..ede9752c1e --- /dev/null +++ b/20.02/_cl_addition_workload_8cpp_source.xhtml @@ -0,0 +1,136 @@ + + + + + + + + + + + + + +ArmNN: src/backends/cl/workloads/ClAdditionWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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ClAdditionWorkload.cpp
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1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "ClAdditionWorkload.hpp"
7 
8 #include <cl/ClTensorHandle.hpp>
9 #include <backendsCommon/CpuTensorHandle.hpp>
10 #include <aclCommon/ArmComputeTensorUtils.hpp>
11 
12 #include "ClWorkloadUtils.hpp"
13 
14 namespace armnn
15 {
16 using namespace armcomputetensorutils;
17 
18 static constexpr arm_compute::ConvertPolicy g_AclConvertPolicy = arm_compute::ConvertPolicy::SATURATE;
19 
20 ClAdditionWorkload::ClAdditionWorkload(const AdditionQueueDescriptor& descriptor,
21  const WorkloadInfo& info)
22  : BaseWorkload<AdditionQueueDescriptor>(descriptor, info)
23 {
24  this->m_Data.ValidateInputsOutputs("ClAdditionWorkload", 2, 1);
25 
26  arm_compute::ICLTensor& input0 = static_cast<IClTensorHandle*>(this->m_Data.m_Inputs[0])->GetTensor();
27  arm_compute::ICLTensor& input1 = static_cast<IClTensorHandle*>(this->m_Data.m_Inputs[1])->GetTensor();
28  arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(this->m_Data.m_Outputs[0])->GetTensor();
29  m_Layer.configure(&input0, &input1, &output, g_AclConvertPolicy);
30 }
31 
32 void ClAdditionWorkload::Execute() const
33 {
34  ARMNN_SCOPED_PROFILING_EVENT_CL("ClAdditionWorkload_Execute");
35  RunClFunction(m_Layer, CHECK_LOCATION());
36 }
37 
38 arm_compute::Status ClAdditionValidate(const TensorInfo& input0,
39  const TensorInfo& input1,
40  const TensorInfo& output)
41 {
42  const arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0);
43  const arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1);
44  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
45 
46  const arm_compute::Status aclStatus = arm_compute::CLArithmeticAddition::validate(&aclInput0Info,
47  &aclInput1Info,
48  &aclOutputInfo,
49  g_AclConvertPolicy);
50 
51  return aclStatus;
52 }
53 
54 } //namespace armnn
+
ARMNN_SCOPED_PROFILING_EVENT_CL
#define ARMNN_SCOPED_PROFILING_EVENT_CL(name)
Definition: ClWorkloadUtils.hpp:20
+
armnn::RunClFunction
void RunClFunction(arm_compute::IFunction &function, const CheckLocation &location)
Definition: ClWorkloadUtils.hpp:131
+
armnn::BaseWorkload< AdditionQueueDescriptor >::m_Data
const AdditionQueueDescriptor m_Data
Definition: Workload.hpp:46
+
armnn::ClAdditionWorkload::Execute
void Execute() const override
Definition: ClAdditionWorkload.cpp:32
+
ArmComputeTensorUtils.hpp
+ +
armnn::QueueDescriptor::ValidateInputsOutputs
void ValidateInputsOutputs(const std::string &descName, unsigned int numExpectedIn, unsigned int numExpectedOut) const
Definition: WorkloadData.cpp:461
+
armnn::ClAdditionWorkload::ClAdditionWorkload
ClAdditionWorkload(const AdditionQueueDescriptor &descriptor, const WorkloadInfo &info)
Definition: ClAdditionWorkload.cpp:20
+
armnn::ClAdditionValidate
arm_compute::Status ClAdditionValidate(const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
Definition: ClAdditionWorkload.cpp:38
+
armnn
Copyright (c) 2020 ARM Limited.
Definition: 00_introduction.dox:25
+ +
ClAdditionWorkload.hpp
+
armnn::Status
Status
enumeration
Definition: Types.hpp:26
+
CHECK_LOCATION
#define CHECK_LOCATION()
Definition: Exceptions.hpp:192
+
CpuTensorHandle.hpp
+
ClTensorHandle.hpp
+
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:31
+ + +
armnn::WorkloadInfo
Contains information about inputs and outputs to a layer.
Definition: WorkloadInfo.hpp:16
+
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:30
+
ClWorkloadUtils.hpp
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+
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