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2019-09-24IVGCVSW-3885 Add reference workload for DepthToSpaceAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Id937dc4425884ad1985dcdfaae8bf3fb64f0c766
2019-09-24IVGCVSW-3623 Implement NeonTensorHandle::ImportDavid Monahan
Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I7213788725fd4e4cf1176998604e999d0b7ed6cc
2019-09-19IVGCVSW-3723 Adding reference workload support for ArgMinMaxNikhil Raj
Change-Id: I65209ecec4e3abf808163239748d6e830568c2e3 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
2019-09-18IVGCVSW-3878 Add reference workload for SLICEAron Virginas-Tar
* Added reference workload implementation and layer tests for all supported tensor dimensions (1d, 2d, 3d, 4d) Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I40eb300828933e9183027281105d1a7e597d1569
2019-09-16IVGCVSW-3694 Add ArgMinMax implementation for RefNarumol Prangnawarat
* Add ArgMinMax implementation * Add utility function to get number of elements between axis * Add utility function to get unsigned axis * Unit tests for ArgMinMax function Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I7bc3d610dda9526190187eb87394a8ed7a4b5cdd
2019-09-16IVGCVSW-3687 Add INetworkProperties to LoadNetworkDavid Monahan
* Allows users to specify if Import/Export should be used Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I64da26a6acbeb91ef72d31b6ccc01bb1447f624d
2019-09-16IVGCVSW-3868 Add support of Int32 to Reshape layerNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I1bf116c462fe3428be31b6dbcd09b25c3a90727f
2019-09-16IVGCVSW-3858 Fix RefTensorHandleTests on Raspberry PiAron Virginas-Tar
* Fix alignment check to use sizeof(size_t) instead of a hard-coded value Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I092c4464c6cecb2403da9b7744b68ad063ddbad1
2019-09-16IVGCVSW-3660 Add SQRT unit tests for Neon and CL backendsSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Iaaff33f578c4d88f6c03c8de4af71d5347178eaa
2019-09-12IVGCVSW-3857 Add Reference FP16 workload support to remaining layersMatthew Jackson
* Adds Reference FP16 support and unit tests for layers not already supported !referencetests:202156 Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I6fc9b9ce2809e163f72e27e877025c8fb85d9fbe
2019-09-11IVGCVSW-3845 Add Reference FP16 support for required layersMatthew Jackson
* Working on layers required by FSRCNN, FCRN and DeepSpeaker * Updates RefLayerSupport and RefWorkloadFactory methods * Adds RefPadFloat16Workload * Tested by successful execution of these networks on Reference FP16 backend Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I4817dca0a89bba6902f0feffc494b27a26a0ab2d
2019-09-10IVGCVSW-3824 Implement Float 16 Encoder and DecoderMatthew Jackson
* Implement Float 16 Encoder and Decoder * Add Stack Float 16 layer and create workload tests Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: Ice4678226f4d22c06ebcc6db3052d42ce0c1bd67
2019-09-09IVGCVSW-3743 Add end-to-end test for ABS on CpuRefAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I807a57af6dc2555a5a422388558a02e958ed610d
2019-09-06IVGCVSW-3740 Add Reference Workload support for ABSSadik Armagan
* Implemented RefAbsWorkload and unit tests Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ibfcdb2b37fd8d240c181f96856e2c997a4b88914
2019-09-04IVGCVBENCH-1337 Added additional layer parameters to dot file and -v optionAndre Ghattas
* Generic layer parameters now show up in dot file * Convolution layer parameters have also been added to dot file * ExecucteNetwork has an additional -v flag which generated dot file if there Change-Id: I210bb19b45384eb3639b7e488c7a89049fa6f18d Signed-off-by: Andre Ghattas <andre.ghattas@arm.com> Signed-off-by: Szilard Papp <szilard.papp@arm.com>
2019-08-30IVGCVSW-3381 Break up LayerTests.hpp into more manageable filesAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Icf39434f09fd340ad664cb3b97b8bee6d9da4838
2019-08-29IVGCVSW-3656 Fix wrong rename of the reference backend control macroMatteo Martincigh
* Renamed ARMNN_COMPUTE_REF_ENABLED to ARMNN_REF_ENABLED in the Android makefiles Change-Id: I12af2ca00c719568274585482d428b035674737c Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-08-27IVGCVSW-3656 Rename ARMCOMPUTEREF to ARMNNREFMatteo Martincigh
* Renamed ARMCOMPUTEREF to ARMNNREF (and relative symbols) as the previous name was misleading !android-nn-driver:1819 Change-Id: I912e9f521750b91539e48f8a2fb4de73fb6f7425 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-08-26IVGCVSW-3575 Fix DepthwiseConvolution VTS Test FailuresKevin May
Failing VTS tests were "NeuralnetworksHidlTest.depthwise_conv2d_*" In depthwise convolution there was a difference in weight tensor channel order between the reference and ACL implementations. This specifically related to NCHW. This commit: * Adds ReorderWeightChannelsForAcl to WorkloadUtils which will correct the weight tensor channel order. * Add unit tests to detect this problem. Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: Icaeac08e14b3d5da9e222ad2f118db55ebb15d09
2019-08-26IVGCVSW-3175 Add Regression Tests for Zero CopyFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I6f16ea0dca359283a3b187e2f046f82a7dc2ff7c
2019-08-23Fix Windows build:Rob Hughes
* CMake "install" commands require a RUNTIME argument for platforms with DLLs (e.g. Windows). * Replace use of non-standard variable length array with vector * Remove unnecessary #include of unistd.h * Add #ifdefs to dynamic backend code to disable for non-Unix platforms where you can't use dlopen etc. We could implement this properly for Windows later using LoadLibrary etc., but for now erroring is fine. * Add missing #include of <algorithm> Change-Id: Ic8ef5fd599b37bf8772510157b6e479819f6a1eb
2019-08-22IVGCVSW-3670 Fix Vts Tests after adding Ref Import functionalityFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I87d003ae14575d7d7be67b2a7d00d69ef6201849
2019-08-22IVGCVSW-3656 Make the reference backend optionalMatteo Martincigh
* Made the build of the reference backend depend on a new ARMCOMPUTEREF macro * Made the relevant targets dependent on the ref backend * Moved Cl and Neon static registry initializers to separate files * Wrapped some of the unit tests into proper ifdefs where necessary Change-Id: I7f2c42699682630233a4c4b6aed2f005083de189 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-08-22IVGCVSW-3668 Fix Android issue running Ref Import testsFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I64f82c0e3c5cddcaebe0d5001020880a759ec444
2019-08-21IVGCVSW-3642 Fixed VTS Test FailuresMike Kelly
* Fixed Quant8 VTS test failures where an output value should have been greater than 255 before a negative bias was applied. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ie0084c1c8c4a4b5f069112d523765ed338277e58
2019-08-20IVGCVSW-3606 Support memory import for Reference backendFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I94bd191f88e0911ad4e4727610e81cd7afa95512
2019-08-20IVGCVSW-3640 Add multi-channel TransposeConvolution2d unit tests to CL backendAron Virginas-Tar
* Fixed bug in multi-channel test and reference workload implementation * Enabled multi-channel tests on CL backend Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I08bb523bc68d9c93a1012b4f487a5bce36a085b1
2019-08-16IVGCVSW-3639 Add 5d tensor supportMatthew Jackson
* Increased MaxNumOfTensorDimensions and fixed issues related to its use * Fixed issues caused by assuming 5d tensors are invalid * Updated ArmComputeTensorUtils for 5d tensors * Added 5d tensor unit tests for add, mul, stack and reshape (needed by IVGCVSW-3527) Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I5bcd64942d0d04efcc6c5acb240ad4b88e010743
2019-08-14IVGCVSW-3633 Fixed possible driver crashMike Kelly
* Fixed possible driver crash due to supportedTypes arrays with the wrong size. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I52702b84089d02d3c63ff7aa5923a9f5628bec91
2019-08-14IVGCVSW-3610 Remove unused leftover variable from TransposeConvolution2dImplAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I496f95ab464f3a38e0601799a6ff6ba5ffe3a776
2019-08-14IVGCVSW-3474 Refactor Lstm and QuantizedLstm Param GettersFrancis Murtagh
* Change Getter Signatures to follow coding guidelines Change-Id: Ic02621e834dbf79b9df63f8b4c6339f71651e944 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-08-13IVGCVSW-3635 Remove temporary check from ↵Aron Virginas-Tar
RefLayerSupport::IsTransposeConvolution2dSupported() Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I85a9563e2d12a5eb9dbcac1b70563a303905b67b
2019-08-13IVGCVSW-3616 Add multi-channel unit test for TransposeConvolution2dAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Ib9271920b39fb9d730006c79a322e32008096b56
2019-08-13IVGCVSW-3615 Update Transpose Convolution algorithmMike Kelly
* Now supports channel multiplier != 1 in Ref TransposeConvolution2d Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ice95444025311b8b952c8f7f5fa0f1ecf483df41
2019-08-13IVGCVSW-3620 Fix VTS CpuRef failuresSadik Armagan
* Fixed Max and Min VTS test failures. Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I133f5ff43774f74ad6e1c698a3570066ad45527c
2019-08-12IVGCVSW-3546 Create a reference dynamic backend to use for testing and asMatteo Martincigh
an example in the docs * Wrapped the reference backend into a dynamic backend * Moved the static registration code to a separate file, so that it is possible to create the reference dynamic backend that does not register statically into armnn * Added unit test Change-Id: I1074d21b020820f9ac8c7178388be773b447555a Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-08-05IVGCVSW-3277 Mem export/import suppor for TensorsDerek Lamberti
* Rename MemoryStrategy to EdgeStrategy * Add MemImportLayer * Import memory rather than copy when possible Change-Id: I1d3a9414f2cbe517dc2aae9bbd4fdd92712b38ef Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2019-08-05IVGCVSW-3611 Report TransposeConvolution2d as unsupported on CpuRef when ↵Aron Virginas-Tar
channel multiplier != 1 Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I784bbff3f7b6650881d3f70ba7cd1891171195b1
2019-08-02IVGCVSW-3609 Fix decoding and encoding of INT32 tensorsAron Virginas-Tar
* Added Int32Decoder and Int32Encoder to decode INT32 tensors * Changed MakeDecoder to return ScaledInt32Decoder only if the scale is different from 0, i.e. for quantized bias tensors Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I278061d445d1c549c7ace11f51aa172ce7c691ae
2019-08-01IVGCVSW-3571 Fix VTS Test SkipsMike Kelly
* Fixed FP16 failures on Max, Min, BatchToSpace on Gpu * Fixed Signed32 skips on Maximum and Minimum Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I4bea19af1a0ae4c8950af8c6d5d68622cdd9b674
2019-08-01IVGCVSW-3539 Add CL support and tests for StackMatthew Jackson
* Added CL backend support for Stack * Added unit tests for Stack on the CL backend * Refactored unit tests to support generic data types Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I38ee3e9d8947ea98a3104c982698001e704d7d89
2019-07-30IVGCVSW-3592 Add Support for Quantize to HAL 1.2 DriverSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ib93c94a15fe15495664d509630cce373a69e1612
2019-07-26IVGCVSW-3537 Add support for L2 Normalization with < 4 dimensional tensorsMatthew Jackson
* Fix reference L2 Normalization workload to support < 4 dimensional tensors * Add unit test for L2 Normalization with 2d tensor to Reference, Neon and CL test suites * Fix typo in StackLayer Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I48a6a1289bcb02955b24f261bc70b467bd1abc23
2019-07-25IVGCVSW-3521 CpuAcc V1.2 pad FailuresMike Kelly
* Pad value for QASYMM8 is no longer stored in quantized form. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I048e1d233353c0560ae03a7cc1ed5199295352bc
2019-07-23Fix various uses of non-standard C++:Rob Hughes
* Replace u_int32_t with uint32_t * Replace size_t with uint32_t for initializer list of TensorInfo * Replace variable size arrays with std::vector * Replace reference to local variable during its initialisation Change-Id: I298b3995f1525f90a1ab2416d7e270315698fae3
2019-07-23IVGCVSW-3536 Add Axis parameter to reference Softmax implementationFrancis Murtagh
* Add Axis parameter to Softmax Descriptor * Add new reference implementation for Softmax using Axis parameter * Add unit tests to cover each Axis Change-Id: Iafac2275d2212337456f2b1b56b0f76f77fb9543 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-07-22IVGCVSW-3368 Add reference support for depthwise multiplier > 3Matthew Jackson
* Remove multiplier check in TfLite parser * Add reference unit test for depthwise multipler of 64, as in DeepSpeaker Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I787339ab4c4d269333985353d191202d070906ba
2019-07-19IVGCVSW-3479 Add End to End test for PreluNikhil Raj
Change-Id: I041bdf9e721a4384ea3c2be0184787dd1f4ea08e Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
2019-07-17IVGCVSW-3419 Add reference workload support for the new Stack layerMatthew Jackson
* Added reference workload for the Stack layer * Added factory methods * Added validation support * Added unit tests Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: Ib14b72c15f53a2a2ca152afc357ce2aa405ccc88
2019-07-15IVGCVSW-3495 Refactor names of convolution2d unit testsJan Eilers
Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Idb1325cba730dbf62b4742e4078220ef97d4b526
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