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2023-07-27IVGCVSW-2292 Tile Operator Neon ImplementationDavid Monahan
* Added Implementation of the Tile Operator Workload to Neon * Added calls to the existing unittests * Added Documentation Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I0030ffe514215c79f5629d20671254dde9bec452
2023-07-14IVGCVSW-7830 Add backend optimizations to remove Reshapes where possibleMike Kelly
* Added optimization to remove reshapes for Neon and Ref Backends by using overridden TensorInfos * Added ability to delete Subgraphs during Optimization * Fixed naming error in NeonEndToEndTests and CLEndToEndTests * Added LayerNameAndTypeCheck for testing. * Fixed error where layers were not marked as altered when removed in CLBackend Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I1ac25cd4ec9821470d961831ae2c8d24882276cc
2023-07-10IVGCVSW-7785 3D tensors in BATCH_TO_SPACE and SPACE_TO_BATCH in CpuAcc & GpuAccTeresa Charlin
* Add Reshape layers before and after to extend support for 3D tensors, as ACL only supports 4D tensors for those layers * Add Unit Tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4431185ce3a3b2f595d2a79bdda7095212d1c52d
2023-05-18IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE to CpuAcc and GpuAccJohn Mcloughlin
* Add POW SQUARED_DIFFERENCE and Unit tests for CpuAcc and GpuAcc Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ifa78af2a2fda2074586d8e4d9a506b1b13fa5755
2023-05-08IVGCVSW-7307 Add CpuAcc Batch MatMul WorkloadTeresa Charlin
* Call dedicated MatMul kernel in ACL * Add int8 tests * Add int8 to documentation * Force tensors to be dynamic (nonConst) as per request of ACL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I992ae9aae1174214607bf29305f21cdeaf3fdc1b
2023-04-27Add unit test for Neon Convert workloadsMatthew Bentham
Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com> Change-Id: I501a3e01932d44eca796e93a9383378dafc758c5
2023-04-18GitHub #719 Set quantization parameter scale to 1.0, instead of 0.0.Teresa Charlin
* Arm NN does not account for int8 or uint8 not quantized types, Tensorflow does. Not quantized int8 and uint8 is the same as quantized int8 and uint8 with scale = 1.0 and offset= 0 Default offset/zero_point was already 0, this review sets the default scale to 1.0. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibc3eecc281de516c2cc706e17bde01c64ff9556e
2023-04-12IVGCVSW-7197 Implement Pimpl Idiom for OptimizerOptionsJohn Mcloughlin
Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: Id4bdc31e3e6f18ccaef232c29a2d2825c915b21c
2023-04-11IVGCVSW-7507 Pass m_Crops in BatchToSpaceND CpuAcc and GpuAcc workloadsTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I902c9187eefe7595271312fdc16273f7aa3d41cd
2023-04-04Remove GetGraph and include of Graph.hpp header from public headerMatthew Bentham
Remove deprecated GetGraph() from OptimizationViews. This method has been deprecated for a long time and no backends still need it. Remove include of Graph.hpp from the public headers. Add includes elsewhere to deal with the header fallout. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: I8dae275a8a446d9d0e19be62684e9b3cd2fa493d
2023-03-31Revert "IVGCVSW-3808 Deprecation notices for old ElementwiseBinary layers"Mike Kelly
This reverts commit 52e90bf59ecbe90d33368d8fc1fd120f07658aaf. Change-Id: I5a0d244593d8e760ee7ba0c9d38c02377e1bdc24 Signed-off-by: Mike Kelly <mike.kelly@arm.com>
2023-03-30IVGCVSW-3808 Deprecation notices for old ElementwiseBinary layersMike Kelly
* Added Deprecation notices for old ElementwiseBinary layers. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Iebbbaff38cc9c347b25eb2f9054c914a4f931c68
2023-03-14IVGCVSW-3808 Add ElementwiseBinaryLayerMike Kelly
!android-nn-driver:9329 * Added ElementwiseBinaryLayer that can represent all ElementwiseBinary operations including Add, Div, Sub, Maximum, Mul and Minimum. * Updated Delegate to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated Deserializer to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated OnnxParser to use ElementwiseBinaryLayer instead of the Add layer. * Updated TfLiteParser to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated CL and Neon tests to use ElementwiseBinaryLayer. * Updated CL and Neon Backend Specific Optimizations to accept ElementBinaryLayers as well as Add, Div, Mul, Sub, Maximum and Minimum layers. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I7cbb96b60eb01f0e2b57b0541016d48a08b86c75
2023-01-13IVGCVSW-7173 Add Rsqrt to Tosa Ref BackendDavid Monahan
* Added ElementwiseUnary support with a mapping for Rsqrt * Added unittests * Added Rsqrt EndtoEnd tests for all backends * Changed TosaRefLayerSupport to default to false on unsupported layers Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I3eaa9c684647ead61520a563815581aa68bee51b
2023-01-12IVGCVSW-5128 Add EndToEnd test for REDUCE_SUMTeresa Charlin
* Call Reshape EndToEnd test from 3 backends * Tidy up some naming of tests. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5546af35e89d352d3f1529368518aecc0a4a534b
2022-12-07IVGCVSW-6853 Rewrite BuildArmComputePermutationVector()Teresa Charlin
* Some pemutation vectors were not converted correctly. * Add Transpose end to end test. * Comments added with an example to clarify the differences betweeen Transpose and Permute Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6c0954ca6ce00ef5f2a6f3625abe6f4fd27b5cdf
2022-11-16IVGCVSW-7214 Disable BF16-Turbo-Mode and remove conversion layersRyan OShea
- Remove Bf16ToFp32 Conversion Layer - Remove Fp32ToBf16 Conversion Layer - Remove B16 Conversion tests * Throw exception if m_ReduceFp32ToBf16 optimzer option is set to true * Provide comments to enable fast math in order to use bf16 * Update docs to inform users to enable fast math for bf16 Execute Network Changes * Require bf16_turbo_mode to also have fast_math_enabled set to true - Remove setting m_ReduceFp32ToBf16 optimizer option Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ibaa6da9d29c96a1ce32ff5196b0847fde9f04a1c
2022-11-09IVGCVSW-7318 Support basic addition model in the TOSA Reference BackendRyan OShea
* Create Simple Addition EndtoEnd test * Create EndToEndTest file in TosaRef/test directory * Add AdditionEndToEnd test to CpuRef,CpuAcc,GpuAcc,TosaRef Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic44e2b457c25dcb41bb3b17c05cce0e74bf17a80
2022-11-01IVGCVSW-6496 Add EndToEnd Layer test for Batch MatMul WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6a541db9a602609282cc6f33af930ca141b83c41
2022-10-28IVGCVSW-6494 Add CpuAcc Batch MatMul Workload Fp32Teresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I2def6995f81d33e68f1ea45d8d19a1e6294049b1
2022-07-27IVGCVSW-6896 Fix pre-import when using sync execute.Colm Donelan
* Refactor backend capability checks in LoadedNetwork. * ImportInputs should check the number of tensors does not exceed the number of inputs. * In EnqueueWorkload the check for for the count of input tensors was ignoring pre-imported inputs. * Added checks to verify ImportInputs/ImportOutputs worked as expected in EndToEndTestImpl. * Improve documentation on ImportInputs/ImportOutputs in IRuntime.hpp. * Disabled import tests in CL and Neon EndToEndTests that cannot work. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Iae4b2644a1c9f01ee72bce1afb211661cc9ae2e3
2022-06-22Revert "Revert "IVGCVSW-6873 Import inputs but don't export outputs fails.""Francis Murtagh
This reverts commit a0f8b15d4ddb5075f380003ff31b271d389d3b66. Reason for revert: <Test ClDmaBufInternalTests review > Change-Id: Ibc4a77fa008643849da7330391942e4c87b941e2
2022-06-21Revert "IVGCVSW-6873 Import inputs but don't export outputs fails."James Conroy
This reverts commit 03bf98a8bc51ad20eef4b9ca5fbf6ce15e063721. Reason for revert: Caused failures in tests located in internal repo. Change-Id: If35cb0ede349b270e4e7827324382e09455d8cfa
2022-06-20IVGCVSW-6873 Import inputs but don't export outputs fails.Colm Donelan
Only one bool is used to indicate whether inputs should be imported. However, its possible for the user to want to import inputs but not export outputs. In addition it's possible for a user to enabled import during optimize but then pass a memory source that does not require import. * Add m_ExportEnabled to INetwork.hpp. * Modify Network::dNetwork to consider both m_ImportEnabled and m_ExportEnabled. * Add ValidateSourcesMatchOptimizedNetwork to LoadedNetwork to validate import options between optimize and network load. * Update the TfLite delegate consider exportEnabled flag in the optimizer. !armnn-internal-tests:425350 Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I776eab81595898e43f91ab40306962eae61329f4
2022-05-13IVGCVSW-6175 Add Pooling3d to NeonRyan OShea
* Add IsSupported for Pooling3d * Add CreateWorkload case for Pooling3d * Create new NeonPooling3dWorkload header and source files * Add Pooling3d workload to NeonWorkloads.hpp * Add float32 tests for Pooling3d workload * Add Uint8 tests for Cl and NE pooling3d Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic992e1233d1eb8db52df2c8446183df1c907bc4d
2022-05-13IVGCVSW-6260 ConstTensorsAsInput: Fully Connected Cl and Neon support.Cathal Corbett
* IVGCVSW-6940 ConstTensorsAsInput: DepthwiseConvolution2d - Complete Neon and Cl Bug Fix * Bug fix to enable Cl and Neon Backend Compatibility ConstantTensorsAsInputs * Updated Cl and Neon FullyConnected workloads to handle constant weights and bias as inputs rather than reading from member variables. * Prevent non const weights and biases passing CL and NEON validate for Depthwise Convolution. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I0f505ff5998a183152f843d0f6cc74327ba920e7
2022-05-10IVGCVSW-6936 Sqrt for CpuRef, CpuAcc and GpuAccTeresa Charlin
* Add Unit Tests * Bug Fix: add Sqrt to Neon and Cl workload factories Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0db1d813a4e7d15431e87e825e6d14e61f5ffb7d
2022-05-05IVGCVSW-6862 Add GATHERNd Neon workloadTeresa Charlin
* Changing the test in the delegate to match one of the unit tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I553ca266116ba8ee173fc951ab1ffd2b6eed1428
2022-03-23IVGCVSW-6706 Move headers to profiling/client/includeJim Flynn
!android-nn-driver:7337 Change-Id: Ide401623829cc99fb9b51e9bbce3482ce706a8dd Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2022-03-23IVGCVSW-6839 Unidirectional sequence LSTM test failing in Android SCathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Iba9c260a2177aeb837e3f30ed4ec9db3c368e169
2022-03-03Revert "Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm ↵Cathal Corbett
fp32/fp16 to Neon"" This reverts commit f87b90e4dbb906436cf205a2a19e199bfe9224ed. Reason for revert: 22.02 release. Change-Id: I1ca5a79a8957908f655a6c4e79eefa24c5aec645
2022-02-23Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 ↵Cathal Corbett
to Neon" This reverts commit b0baff73b1574a198e57d46fcd704cedc43cea16. Reason for revert: cannot update ACL pin until 22.02 release. Change-Id: I049a125ba3b6a9b1cd6514ef9dd14d807773ed00
2022-02-21IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 to NeonCathal Corbett
!ComputeLibrary:7150 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I3de48ffc8d08c95a22705e2b68d069791bddae73
2022-02-07IVGCVSW-6635 Move MemCopyTestImpl from acl to armnnTestUtils.Colm Donelan
* Move MemCopyTestImpl.hpp from src/backends/aclCommon/test/ to include/armnnTestutils. * Refactor MemCopyTests in aclCommon, cl and Neon. * Introduce RefMemCopyTests to exercise this utility in x86 builds. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I8824f013d3656658ed0a2904bb79384e3af68641
2022-02-03IVGCVSW-6696 Add Forced Import EndToEnd tests to Ref, Neon, and CLDavid Monahan
* Created EndToEnd tests with Misaligned buffers but import is forced * Added the Aligned Tests from a previous patch to avoid merge conflicts * Previous Aligned EndToEnd test for ref has been added to backendsCommon and is now used for neon as well * Added to Ref, Neon, and Gpu Backends * Neon tests only check for copies as reconfigure has not been implemented for the Neon backend yet Signed-off-by: David Monahan <David.Monahan@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I12ddf5780201044834d6d1bbeebce60a4614efd1
2022-01-26IVGCVSW-6683-6684 Add ClBaseWorkload and NeonBaseWorkloadTeresa Charlin
* Neon/Cl Activation workloads inherit from Cl/Neon BaseWorkload * Unit Test for ReplaceTensorHandle functions Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I985e34b93a96405735402a6d3b947957afbe2857
2022-01-25IVGCVSW-6678 Register CopyAndImportFactoryPairs to NeonBackend and unit testsNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: If5392020dfd0caa3f09ea2edbaf0f83ec36ab99b
2022-01-18IVGCVSW-6641 Stabilize the IWorkloadFactory interface with unified strategyTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ia941be9bf2c15fe56e49a9b9a2bbe943a8152438
2022-01-13IVGCVSW-6674 Implement CanBeImported function in NeonTensorHandleDavid Monahan
* Added CanBeImported function * Updated existing checks to use the CanBeImported function * Added Unittest Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: I1fe4b9cf2a803d00f35bb16d0e312fd93503dbd8
2021-12-15IVGCVSW-6626 Promote backend headers in backendCommon to armnn/backendsColm Donelan
Move the following header files from backendsCommon to armnn/backends. * MemCopyWorkload.hpp * TensorHandle.hpp * Workload.hpp * WorkloadData.hpp * WorkloadFactory.hpp Replace them with forwarding headers and a pragma deprecation message. Resolve the deprecation messages in Arm NN code. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I47f116b30f86e478c9057795bc518c391a8ae514
2021-12-14IVGCVSW-6453 'Move the ArmNN Test Utils code to a physically separate directory'Sadik Armagan
* Created include/armnnTestUtils directory * Moved Arm NN test utils files into armnnTestUtils directory Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I03ac54c645c41c52650c4c03b6a58fb1481fef5d
2021-11-18IVGCVSW-6520 Extend pad workload for CpuAcc to support mirror paddingTeresa Charlin
* Add UnitTest for CpuAcc !ComputeLibrary: 6641 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic96b9e28d133cef73312b4ac793325f5e69b3d4d
2021-11-10Fix typo errors from ticket IVGCVSW-6420Cathal Corbett
* Typo errors from ticket 'Constant flag in tensor info is not set correctly'. Not fixed due to code freeze deadline. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Id80ba60647d1970115a8cf200f0d71e4fada9b30
2021-11-08IVGCVSW-6420: Constant flag in tensor info is not set correctlyCathal Corbett
!android-nn-driver:6532 !armnn-internal-tests:372451 * Made fix to 2 out of 3 ConstTensor() constructors in Tensor.hpp to throw InvalidArgumentException when TensorInfo isConstant parameter is false. * Added new ConstTensor() constructor in Tensor.cpp to accept vector<>.data() using template<typename MemoryType>. * Fixed runtime->GetOutputTensorInfo()/GetInputTensorInfo() methods and called submethods to return TensorInfo& rather than TensorInfo. * Fixed all failing unit tests for CpuRef/CpuAcc/GpuAcc to ensure any ConstTensor created has it's TensorInfo isConstant set to true. * Added unit tests in TensorTest.cpp to ensure ConstTensor constructors throw InvalidArgumentException when TensorInfo isConstat parameter is false. * Added unit test to ensure an empty ConstTensor constructor will set TensorInfo isConatant to true. * Indentation fixes. * Fix to arm_tensor.i to add isConstant parameter to TensorInfo constructor. Added methods IsConstant() and SetConstant(). * Fix to const_tensor.py to throw ValueError when TensorInfo isConstant is set to false when constructing a ConstTensor. * Fixed PyArmnn unit tests to set TensorInfo isConstant to True when ConstTensor is used. * Added unit tests in test_const_tensor.py to ensure ConstTensor constructors throw ValueError when TensorInfo isConstat parameter is false. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I44e440dd0422c366d31bbdbc77ad2b4db0bde148
2021-10-27IVGCVSW-6170 Add CpuAcc Conv3d WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I3a5bfef5a0085d172fd3689e67f25af909ace2ee
2021-09-30IVGCVSW-6293 Add Unit test int8 Channel ShuffleTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Icf69b4c707014c5ae76425ad326bd2826381f305
2021-09-29IVGCVSW-3707 Add Channel Shuffle Workload to CpuAcc backendTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I2e3dee3c73fe58c7cfcb3ce3667884202f46e6aa
2021-09-03IVGCVSW-6262 Add support for Reduce ProdTeresa Charlin
* Tflite parser * Tflite delegate * Serializer * Deserializer * Ref, CpuAcc and GpuAcc workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I601a9ee1680b372c7955d9a628857d08c3cfd377
2021-07-12Fix Unittest failures in CL MasterNikhil Raj
* This change is caused by ACL patch: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5855 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I222ff6dea155be38899145a5d096093db1b5e716
2021-06-16IVGCVSW-6088 Add Sin and Log to ElementWiseUnaryTeresa Charlin
* Ref workload * Cl workload * Neon workload * Serializer * Deserializer * Remove boost include from TensorTest.cpp Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I498548169cc77609c55cf3105f1de5a7429772cf