Age | Commit message (Collapse) | Author |
|
* activationInfo passed in directly to configure() rather than part of matMulInfo
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I546def1c1e1cabaf50629f7d78ae0ba459766ed4
|
|
* Break up Utils.h a bit to reduce unused code being included everywhere
* Add FullyConnectedLayerInfo.h to ArmComputeUtils.hpp and remove Types.h
* Add MatMulInfo.h to Neon and CL BatchMatMulWokloads
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I2fbe90cb40dc59add90735dafe9fef9aab3fbf06
|
|
Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: I722a9e4f3dba2500c624c6326f74085277e0d631
|
|
* Remove checks for ias being constant
* Convert ARMNN_ASSERTS to throw
Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: I009f4008393502bd9e30269151ad935ef67f0bc1
|
|
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I54c60fb98b9c560c300572f46d42b13aec7e402e
|
|
* Fix failure to parse UnidirectionalSequenceLstm Operator on CpuAcc
* Fix failure to parse UnidirectionalSequenceLstm Operator on GpuAcc
* Fix IsLayerSupported tests when there are multiple otutputs
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ia690f34d3c7fae87bd36c97056a3ff71baa865f6
|
|
* Dynamic bias are supported by ACL for this layer.
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I428bd42a97e0c26c72f9925e3cb209c2fc9a650d
|
|
* Add POW SQUARED_DIFFERENCE and Unit tests for CpuAcc and GpuAcc
Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com>
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ifa78af2a2fda2074586d8e4d9a506b1b13fa5755
|
|
DWConv and FC"
This reverts commit fecd9ed396705a17805ffc49839bd82ae24c892b.
Reason for revert: IVGCVSW-7727 Dynamic bias CTS failing
Change-Id: I53f67d60fca0e60a81298f90450ceef26b97c321
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
|
|
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ib6914a9a208475b68e969eba6f70fae4061efa9b
|
|
* Set flag for constant weights and bias in ACL tensorInfo in ACl workloads
* Set flag for constant weights and bias in Unit Tests
* Add to dot file for FullyConnected layer the constantWeights flag
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I87e1fef516ce4a8a59245dfdf7d92c153418e1d6
|
|
* Call dedicated MatMul kernel in ACL
* Add int8 tests
* Add int8 to documentation
* Force tensors to be dynamic (nonConst) as per request of ACL
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I7b7ac20deec8637dc46ca990d339d92c4587cbe4
|
|
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I902c9187eefe7595271312fdc16273f7aa3d41cd
|
|
* Added ability to reduce dimension sizes when calling BuildArmComputeTensorInfo or
BuildArmComputeTensorShapes, this will attempt to remove leading 1s in order to
squeeze the number of dimensions but retain the size.
* Changed ClBatchMatMulWorkload to attempt to squeeze the number of dimensions to 3
as the CL Gemm Kernel can only support up to 3 dimensions.
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I6b3d0886c5b97fdb686838fc3dc292833ddc4643
|
|
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I60e9284b90467f58e0acd74d3f1493546b6f1b9b
|
|
* GpuAcc only supports up to 3D, so no 4D test have been added
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ie926cd45c350be624cbdc6cb27c89d2d3f60884b
|
|
* Removed weights and bias from Convolution, DepthwiseConv & FullyConnected
layers
* Removed the weight and bias ConstTensorHandles from the QueueDescriptors
* Updated Workloads to take tensors from WorkloadInfo rather than the
QueueDescriptors
* Removed unused RedirectMembersToConstantInputs optimization and tests.
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I9ffcdc4a1c0dff725539dd69fc435b700bd98a56
|
|
* Added case for Bf16 to switch and changed Assertion to Exception
so it shows up in Release build.
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I817260dc7b7667386c4aa734bea649383866a785
|
|
* Fix made to experimental/armnn_shim_sl branch also required for armnn master branch.
* TestGenerated/GeneratedTests.Sync/argmax_1 fix.
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: Idb0324ff59e1ed13caf5f4bf899d1d3220d823d4
|
|
* BackendHelper.cpp IsXXXLayerSupported doesn't get as far as Neon/Cl
Validate functions where arm_compute::Status is returned.
* Conv2d, Depthwise, DilatedDepthwise and FullyConnected
* Tidy up if() -> if ()
* Clean up logic in FullyConnected so that isLayerSupported gets called
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I5da1a882f4a2f55e90aa984b2b9548a847cb3a2d
|
|
!android-nn-driver:7477
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: Ibf633ccccc385bd980934ff829407d21981323ef
|
|
* Update Front-end and Tools.
* Updated Serializer, Deserializer and unit tests to reflect this.
* Updated TfLiteDelegate, TfLiteParser and OnnxParser.
* Updated Ref.
* Fixed resulting Neon / CL tests
* Unified optimizers for conv2d ops
* Optimizer Fix - Fp32ToBf16
* Partial implementation for ACL backends to fix VTS failures
!android-nn-driver:7477
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I5fb18877f7ee32643e15a9818945356274bb401b
|
|
* IVGCVSW-6940 ConstTensorsAsInput: DepthwiseConvolution2d - Complete Neon and Cl Bug Fix
* Bug fix to enable Cl and Neon Backend Compatibility ConstantTensorsAsInputs
* Updated Cl and Neon FullyConnected workloads to handle constant
weights and bias as inputs rather than reading from member variables.
* Prevent non const weights and biases passing CL and NEON validate
for Depthwise Convolution.
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I0f505ff5998a183152f843d0f6cc74327ba920e7
|
|
* Added backend specific optimization & test for CpuAcc and GpuAcc: PermuteDepthwiseConv2dWeights
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I600476b2e9c557a39818a574c1091c9d650b21b1
|
|
* Add Unit Tests
* Bug Fix: add Sqrt to Neon and Cl workload factories
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I0db1d813a4e7d15431e87e825e6d14e61f5ffb7d
|
|
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I8ba7e56062c285c672dcaa9d13be319eb4f1fca6
|
|
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ib90bade63cd0437329c690b09cf719a2e2bd06a4
|
|
* Corrected TensorInfo order for IsUnidirectionalSequenceLstmSupported
* outputStateOut TensorInfo is not optional.
* cellStateOut TensorInfo is not optional.
* TensorInfo Order matches other QLSTM/LSTM layers.
* Added missing parameters to UnidirectionalSequenceLstmOperator for
delegate.
* Added quantized UnidirectionalSequenceLstm support to Neon
!android-nn-driver:7457
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I26dde1bb96793dd25eb9081ca5ae5f63752288c4
|
|
* Add IsSupported for Pooling3d
* Add CreateWorkload case for Pooling3d
* Create new ClPooling3dWorkload header and source files
* Add Pooling3d workload to ClWorkloads.hpp
* Add tests for Pooling3d workload
* Add Pooling3d build function to ArmComputeTensorUtils
Change-Id: Ia270b0fe809a171ed73af14376de8708b346d500
Signed-off-by: Ryan OShea <ryan.oshea3@arm.com>
|
|
android-nn-driver do not execute.
* Change to src/backends/cl/workloads/ClLstmFloatWorkload.cpp fix LstmTests_GpuAcc tests.
* Change to src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp & ClConvertFp32ToFp16Workload.hpp
fix MeanTests_GpuAcc and Convolution2DTests_1.1 tests.
* Added UnitTests to src/backends/cl/test/ClImportTensorHandleTests.cpp to test import on Convert Layers.
!android-nn-driver:7264
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I0c46dc4b9c54eca8771ab12ed0302b6224606957
|
|
!android-nn-driver:7337
Change-Id: Ide401623829cc99fb9b51e9bbce3482ce706a8dd
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
|
|
fp32/fp16 to Cl""
This reverts commit 79cef69b1ec58f9ce010461eaaad04c896a4fe15.
Reason for revert: 22.05 release.
Change-Id: Id2ecbf563e8808694fb8605604e8c3c39c29cec2
|
|
fp32/fp16 to Neon""
This reverts commit f87b90e4dbb906436cf205a2a19e199bfe9224ed.
Reason for revert: 22.02 release.
Change-Id: I1ca5a79a8957908f655a6c4e79eefa24c5aec645
|
|
Signed-off-by: David Monahan <David.Monahan@arm.com>
Change-Id: Ia916219a33535f4c288fa44fdc23961a3e54e788
|
|
to Neon"
This reverts commit b0baff73b1574a198e57d46fcd704cedc43cea16.
Reason for revert: cannot update ACL pin until 22.02 release.
Change-Id: I049a125ba3b6a9b1cd6514ef9dd14d807773ed00
|
|
to Cl"
This reverts commit ad9171701e6032b3ddf3573f85780bae30c512c6.
Reason for revert: cannot update ACL pin until 22.02 release.
!ComputeLibrary:7150
Change-Id: Ic19a3c2fe5d6f7e5568174f18ea73684b269f72d
|
|
!ComputeLibrary:7150
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I01690e6555978d93c41d09bbe5378683bc925f61
|
|
!ComputeLibrary:7150
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I3de48ffc8d08c95a22705e2b68d069791bddae73
|
|
Signed-off-by: David Monahan <David.Monahan@arm.com>
Change-Id: Ie78d84949a4af3d9598ab0c1c035688bd39bb806
|
|
* Find and replace all workloads associated with imported IO
* Only attempt tensorhandle replacement if supported by all workloads
* Add new RefBaseWorkload to enable forced input for ref backend
* Store imported tensorhandles in preImportedTensorhandles instead of outputHandles
* Create pre-imported tensorhandles at network load-time
* Front load import workload validation to load network time
* Only call ReplaceTensorHandle when needed
Change-Id: I3816a71b7f57ae90388bb16462a75d4ef3544fa7
Signed-off-by: Finn Williams <finn.williams@arm.com>
|
|
Change-Id: Id993a300847bde012dd38ef7f44fcd3c14867349
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
|
|
* Neon and CL workloads which inherit from TypedWorkload instead of the BaseWorklod for their backend do not contain the correct ReplaceInputTensorHandle/ReplaceOutputTensorHandle and Reconfigure functions. So they have been added directly.
* Removed the Profiling call from ClConvolution2dWorkload::Reconfigure() to avoid a segfault
Signed-off-by: David Monahan <David.Monahan@arm.com>
Change-Id: I7b9d1b48fdb17db1662dc03c22acc746340ce73f
|
|
Use armnn::Optional for optional bias TensorInfos, similar to how
it's already done in Convolution etc.
Fixes some test failures found using -fsanitize=undefined
Change-Id: I7b887e63e2ffab14aeab14415069be738d938ebb
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
|
|
* Add AllocatedData functions to OutputHandler
* Enable import aligned memory in ImportInputs
* Enable import aligned memory in ImportOutputs
* Allow to import input and output if the memory is aligned
* Implement Reconfigure function on ClConvolution2dWorkload
* End-to-end test on Ref and Cl to ensure that input and output memory
are imported when aligned
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I9e5e4c26d1ac2f1d806803ade5f64c6479c51718
|
|
* Neon workloads to extend NeonBaseWorkload instead of BaseWorkload
* Cl workload to extend ClBaseWorkload instead of BaseWorkload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I8f39a31a89a8865ac4acf18573ab290d548d2864
|
|
* Neon/Cl Activation workloads inherit from Cl/Neon BaseWorkload
* Unit Test for ReplaceTensorHandle functions
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I985e34b93a96405735402a6d3b947957afbe2857
|
|
Move the following header files from backendsCommon to armnn/backends.
* MemCopyWorkload.hpp
* TensorHandle.hpp
* Workload.hpp
* WorkloadData.hpp
* WorkloadFactory.hpp
Replace them with forwarding headers and a pragma deprecation message.
Resolve the deprecation messages in Arm NN code.
Signed-off-by: Colm Donelan <colm.donelan@arm.com>
Change-Id: I47f116b30f86e478c9057795bc518c391a8ae514
|
|
* Add UnitTest for GpuAcc
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I235900dc62fb043c5ce9c8cd4f63dcc4e5393233
|
|
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ifbb9332c78c843c5b937c4e1b50a8f5a75409e73
|
|
Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: I7626d5bd82e832d5be6913719a34d76fbd1dbed8
|