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* This change is necessary because tflite uses a [1,H,W,I*M] format
and uses the I*M dimension for per axis quantization. Our previous
layout [M,I,H,W] can't handle the correlating quantization scales.
* Updates Onnx-, TfLiteParser and TfliteDelegate
* Updates the CpuRef, CpuAcc and GpuAcc backends
* Adjusts unit tests
* Adds test to ensure models with old layout can still be read and
executed
* Adds conversion function to previous layout [1,H,W,I*M] --> [M,I,H,W]
which can be used by backend developers
!android-nn-driver:5553
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Ifef23368b8c3702cf315a5838d214f7dc13c0152
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* Generalises ConstCpuTensorHandle and inherited
classes by removing 'Cpu' from aliases.
* New renamed classes: ConstTensorHandle, TensorHandle,
ScopedTensorHandle, PassthroughTensorHandle,
ConstPassthroughTensorHandle.
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I1824e0e134202735fb77051f20a7252f161dfe16
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* Changed behaviour of bias scale tolerance check such that if
input quant * weight quant != bias quant +/- tolerance
Then instead of throwing an error we send a warning.
* Updated tests to reflect changes
Signed-off-by: mathad01 <matthew.haddon@arm.com>
Change-Id: Ifd97c574fe13805660df4636e9616b2d786b490d
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IVGCVSW-5415 Add TfLiteParser support for CAST
* Added front end support for CAST, including support in the
Reference workload, Serialization, Deserializtion, Unit tests, and
TfLiteParser.
Signed-off-by: mathad01 <matthew.haddon@arm.com>
Change-Id: Iaf670ca5912a21ed6bc84f7f83a68b42154846bb
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TfLiteDelegate support for FullyConnected Operator'
* Added front-end support for non-const weights for FULLY_CONNECTED operator
* Added FULLY_CONNECTED end-to-end test
* Updated FULLY_CONNECTED operator support in TfLite Arm NN Delegate for non-const weights
* Updated the version numbers
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Iffa5b9aa9297aca4c02d923cce4636c88ac21faa
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* Allow input tensors of any rank in ReduceQueueDescriptor::validate
* Fix VTS tests failing for REDUCE_MIN due to initialization
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Id8fba1662ade4e0a967093fe5a53b275847f2393
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This patch addes ReduceSum operation support for reference backend,
which computes the sum of elements across dimensions of a tensor.
Changelog v1:
- Fix file header descriptions.
Chagelog v2:
- Fix line limit issue.
- Fix type conversion issue.
Changelog v3:
- Remove tabs.
- Modify newly added file headers.
Changelog v4:
- Symbol on header isn't allowed so drop it from newly added file headers.
Changelog v5:
- Remove tabs, fix the use of brackets and align lines correctly.
Changelog v6:
- Add serializer and deserializer support.
Changelog v7:
- Fix build error add missed code.
Changelog v8:
- Rename ReduceSumDecriptor to ReduceDescriptor
- Update m_KeepDims field data type to bool on ReduceDescriptor
- Add ReduceOperation field to ReduceDescriptor
- Rename ReduceSumLayer to ReduceLayer
- Update ReduceLayer to use ReduceDescriptor
- Update ReduceLayer::ValidateTensorShapesFromInputs() function
- Rename RefReduceSumWokload to RefReduceWorkload
- Update workload to use ReduceDescriptor
- Update workload to use Decoders and Encoders
- Remove ReduceSum.hpp and ReduceSum.cpp
- Added Reduce.hpp and Reduce.cpp
- Move Mean.cpp (which is implementing REDUCE_MEAN) functionality to Reduce.cpp
- Update RefMeanWorkload to call Reduce function with ReduceOperation::Mean argument
- Remove Mean.hpp and Mean.cpp
- Update the Serializer/Deserializer ArmnnSchema.fbs for ReduceLayer, ReduceDescriptor, and ReduceOperation
- Update Serializer and Deserializer for serializing/parsing ReduceLayer
- Added TfLiter parser Sum test for REDUCE_SUM operator
- Make corresponding changes on front-end and Ref backend to support REDUCE_SUM operator
Changelog v9:
- Fixed build errors.
Change-Id: I8c8e034f3df73f9565b3c18eff51ecca6c542195
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
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* Convolution
* Depthwise Convolution
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I61b356fbffb176e9a05e08d9b6867d082b6712c8
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* Add Boolean support for Reshape
* Use LogicalUnary factory and data type for LogicalNot
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I8e072fde200b7716556ae67f79616458cf98ff20
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* Now enter if block if bias OR weights have
multiple quantization scales.
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I5eba0ceac9b347d0e3467e86d72d587b749b9521
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* Add frontend and reference implementation for logical
ops NOT, AND, OR.
* Unary NOT uses existing ElementwiseUnary layer and
ElementwiseUnary descriptor.
* Binary AND/OR uses new layer LogicalBinary and new
LogicalBinary descriptor.
* Add serialization/deserializion support and add missing
ElementwiseUnary deserializer code.
* Add additional Boolean decoder in BaseIterator.hpp.
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: Id343b01174053a166de1b98b6175e04a5065f720
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Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Change-Id: Ie5ecfa67e4763d0c058905592fe2e2fd7315f85c
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Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Id2227c58809b84c7a7af61f7c0d88ad7d45ce558
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* replaced with fmt::format
* one case required std:stringstream instead
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Ife7c4cf5f143e43373f42edf6124158af132abc5
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This patch adds int32 and int64 ArgMax op support.
Current ARMNN already has ArgMax op but not used, and
it doesn't support int64 output type.
So this patch adds a new type, Signed64, and also adds
ArgMinMax computation function for int64 type support.
In default, output tensor type of ArgMax op is int64 in case of
tensorflow lite model so this patch makes a proper function - ArgMax op
for int64 or int32 - to be called according to parsed output_type value.
With this patch, ARMNN supports both types - int64 and int32 - for
ArgMinMax op.
Changelog v1:
- Check if output data type of ArgMinMax op is valid or not.
- Use template function to support int32 and int64 types of ArgMinMax function.
- Keep using Signed32 as default data type of m_Output_Type.
Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14
Signed-off-by: Inki Dae <inki.dae@samsung.com>
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* Replaced with armnn/utility/NumericCast.hpp
* Some exclusions in reference backend
* Excluded as requires float implementation in NumericCast.hpp
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I9e4e9cd502c865452128fa04415fd6f250baa855
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* Add Rank front end
* Add Rank reference implementation
* Add Rank serialization support
* Add Scalar serialization support
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I06e4a468c2a84e79bae2e6c5348596bbbf853b4b
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* Added new fill layer
* Added visitor tests
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Change-Id: Iea677014866b4f2d514004623f59ee83f3c0eef8
Signed-off-by: Keith Davis <keith.davis@arm.com>
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Change-Id: Ia4b4bb3be0ed6e933c77d58f8e9879b1370e9537
Signed-off-by: Laurent Carlier <laurent.carlier@arm.com>
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Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ica217d3e4fbcdef1315554ea5d5c4720124696c3
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skipped in CpuRef
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I1c870ac258e8c3805a95b259cb40731f8e81541e
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* Number of elements is output size for projection bias on QLSTM
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I9d32cfb187bbe0c6ef809a7a89da907fbac83380
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* Adds ref implemenation for new HAL 1.3
operator, QLstm.
* Adds Layer and CreateWorkload unit tests.
* Adds WorkloadData validate for QLstm.
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I8a721f07ff06105e6495a1a0561b9503aa8146dc
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operators
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I094125ba80699cc3cf5226bda6662a54e6caa988
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* Add Signed32 to WorkloadData for AbsQueueDescriptor
* Add missing supported tests to Ref and Neon
Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: Iba9d29fedeb1d2e985272c9299ea42ba2571687b
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* Change boost assert to armnn assert
* Change include file to armnn assert
* Fix ARMNN_ASSERT_MSG issue with multiple conditions
* Change BOOST_ASSERT to BOOST_TEST where appropriate
* Remove unused include statements
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I5d0fa3a37b7c1c921216de68f0073aa34702c9ff
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Convolution2d and FullyConnected layers
* Add InsertConvertFp32ToBf16LayersBefore
* Add ConvertWeight to ConvertFp32NetworkToBf16Impl for Conv2d and FullyConnected
* Allow different input and output when input is BF16 and output is FP32
Conv2d and FullyConnected layers
* Unit tests
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ic8f92ff28edcae08a72a3114a28f50c4619f919b
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android-nn-driver
* Implemented ClNegWorkload
* Implemented NeonNegWorkload
* Enabled 'NEG' operator on CL and Neon as well as Ref
* Implemented unit tests for 'NEG' operator
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I3d7a892692716636cae6bdf8ddd238e3d1ea064f
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Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I9099a4f840fb747336f77d20a0868b64e801a310
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Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ida6d7e1d2c9abe0618f8b711bab9d62c011090d6
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Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ifaae4d5aac468ba927b2c6a4bf31b8c8522aeb2e
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* Allow per layer quantization from Fp32 to Int8 (QAsymmS8) like TfLite
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I5bbf770aa29d81af3568c15b47d2b2c18e55bb28
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* Relaxed restrictions in BatchNormalizationQueueDescriptor::Validate
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I3101971c2101e90144bbbf7b63367cb0ef09573f
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* Added TransposeLayer
* Added CL, Neon and Ref Workloads
* Added Transpose utilities
* Added Serializer and Deserializer support
* Added Quantizer support
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I04c755ba7cb5b1edf72b3c9f3c0314878032e3c7
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* Add Debug workload for QAsymmS8/U8
* Change Dequantize tests to test AsymmS8 instead of SymmS8
* Fix incorrect supportedness within RefLayerSupport
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: Ie51f1e33c564d46c86bf0150b1addda3fc093d13
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* Add QAsymmS8 to QueueDescriptor supportedTypes
* Add QSymmS8/QAsymmS8 to RefLayerSupport supportedTypes
* Some additional comments and refactoring
Change-Id: I8567314452e6e8f6f69cb6e458ee147d3fc92fab
Signed-off-by: Keith Davis <keith.davis@arm.com>
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* Added Quantization Scheme for QAsymmS8
* Added Unit Tests for QAsymmS8
* Renamed QAsymm8 calls to QAsymmU8
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Change-Id: I897b4e018ba1d808cc3f8c113f2be2dbad49c8db
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* Add no-ops for CL/NEON Uint8
* Refactor Quantize workload to Decoder/Encoder types
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I80b09de528299b925e2ac38acd9a5019b8d3e4ac
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* Added debug layer support for QSymmS8
* QSymmS8 support for workloads
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I51af92fadc0be290629dd9198beab5abef9e351f
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!android-nn-driver:2622
Change-Id: If99d3eff71ff66ba28af1e5af248299fe04511b9
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
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* Added new layer named ElementwiseUnary
* Deprecated existing Abs/Rsqrt layer functions
* Updated existing Abs/Rsqrt test infrastructure to use new layer
* Added boilerplate for new Exp,Neg,Sqrt elemwise op layers
* AbsQuantize test removed pending future commit
* Serialization support added
!android-nn-driver:2550
Change-Id: Ic595c645925e17b45db568187fd05646daf2e87f
Signed-off-by: josh minor <josh.minor@arm.com>
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!android-nn-driver:2572
Change-Id: I8fe52ceb09987b3d05c539409510f535165455cc
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
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Change-Id: I9e8d5576b3ec04c871785d5f2f9545bf1136e59b
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
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!android-nn-driver:2435
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I10ecd4a8937725953396805f33a3562a5384c4d4
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* Create a public API for the common backend files
* Move OutputHandler to armnn internal
* Remove unused headers
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I3e86d908b021e3561befa9d45158d87d2cbb18c0
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* Moved the relevant armnnUtils headers to the new location:
include/armnnUtils
* Update the header usage throughout the source code
!android-nn-driver:2387
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Change-Id: I2ba15cebcacafad2b5a1a7b9c3312ffc585e09d6
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Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Ib790b24cfde87c92e29615da942c25bf7c98f95e
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* Added support for data types QuantisedSymm8 and QuantizedSymm8PerAxis
as they are supported on CpuAcc
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I55f81b35c8869bc37b7634bdbe91b8e3339eb648
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* Add clipping parameter validation in LstmQueueDescriptor
* Related UnitTest
Signed-off-by: janeil01 <jan.eilers@arm.com>
Change-Id: I86ff81cacc0e1fff5b78a8d6c2dcbf9ff57e2272
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* Enabled RefLayerTests for Signed32
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: Idbe6fb7607c7e44a8df560b55f28c64a4c4286cd
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