diff options
Diffstat (limited to 'src/backends/neon/workloads')
8 files changed, 249 insertions, 2 deletions
diff --git a/src/backends/neon/workloads/CMakeLists.txt b/src/backends/neon/workloads/CMakeLists.txt index ca9497e393..b03db99989 100644 --- a/src/backends/neon/workloads/CMakeLists.txt +++ b/src/backends/neon/workloads/CMakeLists.txt @@ -54,10 +54,16 @@ list(APPEND armnnNeonBackendWorkloads_sources NeonInstanceNormalizationWorkload.hpp NeonL2NormalizationFloatWorkload.cpp NeonL2NormalizationFloatWorkload.hpp - NeonLstmFloatWorkload.cpp - NeonLstmFloatWorkload.hpp + NeonLogicalAndWorkload.cpp + NeonLogicalAndWorkload.hpp + NeonLogicalNotWorkload.cpp + NeonLogicalNotWorkload.hpp + NeonLogicalOrWorkload.cpp + NeonLogicalOrWorkload.hpp NeonLogSoftmaxWorkload.cpp NeonLogSoftmaxWorkload.hpp + NeonLstmFloatWorkload.cpp + NeonLstmFloatWorkload.hpp NeonMaximumWorkload.cpp NeonMaximumWorkload.hpp NeonMeanWorkload.cpp diff --git a/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp b/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp new file mode 100644 index 0000000000..d85e05cfe8 --- /dev/null +++ b/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp @@ -0,0 +1,51 @@ +// +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "NeonLogicalAndWorkload.hpp" + +#include "NeonWorkloadUtils.hpp" + +#include <aclCommon/ArmComputeTensorHandle.hpp> +#include <aclCommon/ArmComputeTensorUtils.hpp> + +#include <armnn/utility/PolymorphicDowncast.hpp> + +namespace armnn +{ + +arm_compute::Status NeonLogicalAndWorkloadValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output) +{ + const arm_compute::TensorInfo aclInputInfo0 = BuildArmComputeTensorInfo(input0); + const arm_compute::TensorInfo aclInputInfo1 = BuildArmComputeTensorInfo(input1); + const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output); + + const arm_compute::Status aclStatus = arm_compute::NELogicalAnd::validate(&aclInputInfo0, + &aclInputInfo1, + &aclOutputInfo); + return aclStatus; +} + +NeonLogicalAndWorkload::NeonLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor, + const WorkloadInfo& info) + : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) +{ + m_Data.ValidateInputsOutputs("NeonLogicalAndWorkload", 2, 1); + + arm_compute::ITensor& input0 = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ITensor& input1 = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[1])->GetTensor(); + arm_compute::ITensor& output = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + + m_LogicalAndLayer.configure(&input0, &input1, &output); +} + +void NeonLogicalAndWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonLogicalAndWorkload_Execute"); + m_LogicalAndLayer.run(); +} + +} // namespace armnn diff --git a/src/backends/neon/workloads/NeonLogicalAndWorkload.hpp b/src/backends/neon/workloads/NeonLogicalAndWorkload.hpp new file mode 100644 index 0000000000..1daadab9bb --- /dev/null +++ b/src/backends/neon/workloads/NeonLogicalAndWorkload.hpp @@ -0,0 +1,30 @@ +// +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include <backendsCommon/Workload.hpp> + +#include <arm_compute/core/Error.h> +#include <arm_compute/runtime/NEON/functions/NELogical.h> + +namespace armnn +{ + +arm_compute::Status NeonLogicalAndWorkloadValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output); + +class NeonLogicalAndWorkload : public BaseWorkload<LogicalBinaryQueueDescriptor> +{ +public: + NeonLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info); + virtual void Execute() const override; + +private: + mutable arm_compute::NELogicalAnd m_LogicalAndLayer; +}; + +} //namespace armnn diff --git a/src/backends/neon/workloads/NeonLogicalNotWorkload.cpp b/src/backends/neon/workloads/NeonLogicalNotWorkload.cpp new file mode 100644 index 0000000000..cff5eaf2ba --- /dev/null +++ b/src/backends/neon/workloads/NeonLogicalNotWorkload.cpp @@ -0,0 +1,48 @@ +// +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "NeonLogicalNotWorkload.hpp" + +#include "NeonWorkloadUtils.hpp" + +#include <aclCommon/ArmComputeTensorHandle.hpp> +#include <aclCommon/ArmComputeTensorUtils.hpp> + +#include <armnn/utility/PolymorphicDowncast.hpp> + + +namespace armnn +{ + +arm_compute::Status NeonLogicalNotWorkloadValidate(const TensorInfo& input, + const TensorInfo& output) +{ + const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input); + const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output); + + const arm_compute::Status aclStatus = arm_compute::NELogicalNot::validate(&aclInputInfo, + &aclOutputInfo); + return aclStatus; +} + +NeonLogicalNotWorkload::NeonLogicalNotWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, + const WorkloadInfo& info) + : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) +{ + m_Data.ValidateInputsOutputs("NeonLogicalNotWorkload", 1, 1); + + arm_compute::ITensor& input = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ITensor& output = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + + m_LogicalNotLayer.configure(&input, &output); +} + +void NeonLogicalNotWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonLogicalNotWorkload_Execute"); + m_LogicalNotLayer.run(); +} + +} // namespace armnn diff --git a/src/backends/neon/workloads/NeonLogicalNotWorkload.hpp b/src/backends/neon/workloads/NeonLogicalNotWorkload.hpp new file mode 100644 index 0000000000..31420f7e9b --- /dev/null +++ b/src/backends/neon/workloads/NeonLogicalNotWorkload.hpp @@ -0,0 +1,28 @@ +// +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include <backendsCommon/Workload.hpp> + +#include <arm_compute/core/Error.h> +#include <arm_compute/runtime/NEON/functions/NELogical.h> + +namespace armnn +{ + +arm_compute::Status NeonLogicalNotWorkloadValidate(const TensorInfo& input, const TensorInfo& output); + +class NeonLogicalNotWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +{ +public: + NeonLogicalNotWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); + virtual void Execute() const override; + +private: + mutable arm_compute::NELogicalNot m_LogicalNotLayer; +}; + +} //namespace armnn diff --git a/src/backends/neon/workloads/NeonLogicalOrWorkload.cpp b/src/backends/neon/workloads/NeonLogicalOrWorkload.cpp new file mode 100644 index 0000000000..c3f21e149d --- /dev/null +++ b/src/backends/neon/workloads/NeonLogicalOrWorkload.cpp @@ -0,0 +1,51 @@ +// +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "NeonLogicalOrWorkload.hpp" + +#include "NeonWorkloadUtils.hpp" + +#include <aclCommon/ArmComputeTensorHandle.hpp> +#include <aclCommon/ArmComputeTensorUtils.hpp> + +#include <armnn/utility/PolymorphicDowncast.hpp> + +namespace armnn +{ + +arm_compute::Status NeonLogicalOrWorkloadValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output) +{ + const arm_compute::TensorInfo aclInputInfo0 = BuildArmComputeTensorInfo(input0); + const arm_compute::TensorInfo aclInputInfo1 = BuildArmComputeTensorInfo(input1); + const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output); + + const arm_compute::Status aclStatus = arm_compute::NELogicalOr::validate(&aclInputInfo0, + &aclInputInfo1, + &aclOutputInfo); + return aclStatus; +} + +NeonLogicalOrWorkload::NeonLogicalOrWorkload(const LogicalBinaryQueueDescriptor& descriptor, + const WorkloadInfo& info) + : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) +{ + m_Data.ValidateInputsOutputs("NeonLogicalOrWorkload", 2, 1); + + arm_compute::ITensor& input0 = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ITensor& input1 = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[1])->GetTensor(); + arm_compute::ITensor& output = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + + m_LogicalOrLayer.configure(&input0, &input1, &output); +} + +void NeonLogicalOrWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonLogicalOrWorkload_Execute"); + m_LogicalOrLayer.run(); +} + +} // namespace armnn diff --git a/src/backends/neon/workloads/NeonLogicalOrWorkload.hpp b/src/backends/neon/workloads/NeonLogicalOrWorkload.hpp new file mode 100644 index 0000000000..3b4ddb2d86 --- /dev/null +++ b/src/backends/neon/workloads/NeonLogicalOrWorkload.hpp @@ -0,0 +1,30 @@ +// +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include <backendsCommon/Workload.hpp> + +#include <arm_compute/core/Error.h> +#include <arm_compute/runtime/NEON/functions/NELogical.h> + +namespace armnn +{ + +arm_compute::Status NeonLogicalOrWorkloadValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output); + +class NeonLogicalOrWorkload : public BaseWorkload<LogicalBinaryQueueDescriptor> +{ +public: + NeonLogicalOrWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info); + virtual void Execute() const override; + +private: + mutable arm_compute::NELogicalOr m_LogicalOrLayer; +}; + +} //namespace armnn diff --git a/src/backends/neon/workloads/NeonWorkloads.hpp b/src/backends/neon/workloads/NeonWorkloads.hpp index 590b6f7a29..1a17b9aea9 100644 --- a/src/backends/neon/workloads/NeonWorkloads.hpp +++ b/src/backends/neon/workloads/NeonWorkloads.hpp @@ -30,6 +30,9 @@ #include "NeonGatherWorkload.hpp" #include "NeonInstanceNormalizationWorkload.hpp" #include "NeonL2NormalizationFloatWorkload.hpp" +#include "NeonLogicalAndWorkload.hpp" +#include "NeonLogicalNotWorkload.hpp" +#include "NeonLogicalOrWorkload.hpp" #include "NeonLogSoftmaxWorkload.hpp" #include "NeonLstmFloatWorkload.hpp" #include "NeonMaximumWorkload.hpp" |