diff options
Diffstat (limited to 'src/backends/cl/workloads')
-rw-r--r-- | src/backends/cl/workloads/CMakeLists.txt | 2 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClNegWorkload.cpp | 44 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClNegWorkload.hpp | 28 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClWorkloads.hpp | 1 |
4 files changed, 75 insertions, 0 deletions
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt index 17d69b1ed5..3f964eb1a6 100644 --- a/src/backends/cl/workloads/CMakeLists.txt +++ b/src/backends/cl/workloads/CMakeLists.txt @@ -54,6 +54,8 @@ list(APPEND armnnClBackendWorkloads_sources ClMinimumWorkload.hpp ClMultiplicationWorkload.cpp ClMultiplicationWorkload.hpp + ClNegWorkload.cpp + ClNegWorkload.hpp ClNormalizationFloatWorkload.cpp ClNormalizationFloatWorkload.hpp ClPadWorkload.cpp diff --git a/src/backends/cl/workloads/ClNegWorkload.cpp b/src/backends/cl/workloads/ClNegWorkload.cpp new file mode 100644 index 0000000000..cc6333fff9 --- /dev/null +++ b/src/backends/cl/workloads/ClNegWorkload.cpp @@ -0,0 +1,44 @@ +// +// Copyright © 2020 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClNegWorkload.hpp" + +#include "ClWorkloadUtils.hpp" + +#include <aclCommon/ArmComputeTensorUtils.hpp> + +#include <cl/ClTensorHandle.hpp> + +#include <boost/cast.hpp> + +namespace armnn +{ + +arm_compute::Status ClNegWorkloadValidate(const TensorInfo& input, const TensorInfo& output) +{ + const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input); + const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output); + + return arm_compute::CLNegLayer::validate(&aclInput, &aclOutput); +} + +ClNegWorkload::ClNegWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info) + : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) +{ + m_Data.ValidateInputsOutputs("ClNegWorkload", 1, 1); + + arm_compute::ICLTensor& input = boost::polymorphic_downcast<ClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& output = boost::polymorphic_downcast<ClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + + m_NegLayer.configure(&input, &output); +} + +void ClNegWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_CL("ClNegWorkload_Execute"); + RunClFunction(m_NegLayer, CHECK_LOCATION()); +} + +} // namespace armnn diff --git a/src/backends/cl/workloads/ClNegWorkload.hpp b/src/backends/cl/workloads/ClNegWorkload.hpp new file mode 100644 index 0000000000..9dbfa07665 --- /dev/null +++ b/src/backends/cl/workloads/ClNegWorkload.hpp @@ -0,0 +1,28 @@ +// +// Copyright © 2020 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include <backendsCommon/Workload.hpp> + +#include <arm_compute/core/Error.h> +#include <arm_compute/runtime/CL/functions/CLElementWiseUnaryLayer.h> + +namespace armnn +{ + +arm_compute::Status ClNegWorkloadValidate(const TensorInfo& input, const TensorInfo& output); + +class ClNegWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +{ +public: + ClNegWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); + virtual void Execute() const override; + +private: + mutable arm_compute::CLNegLayer m_NegLayer; +}; + +} // namespace armnn diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp index ec193d5e3e..c7c016379e 100644 --- a/src/backends/cl/workloads/ClWorkloads.hpp +++ b/src/backends/cl/workloads/ClWorkloads.hpp @@ -27,6 +27,7 @@ #include "ClMeanWorkload.hpp" #include "ClMinimumWorkload.hpp" #include "ClMultiplicationWorkload.hpp" +#include "ClNegWorkload.hpp" #include "ClNormalizationFloatWorkload.hpp" #include "ClPermuteWorkload.hpp" #include "ClPadWorkload.hpp" |