diff options
Diffstat (limited to 'src/backends/cl/workloads')
-rw-r--r-- | src/backends/cl/workloads/CMakeLists.txt | 2 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClAbsWorkload.cpp | 44 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClAbsWorkload.hpp | 28 | ||||
-rw-r--r-- | src/backends/cl/workloads/ClWorkloads.hpp | 1 |
4 files changed, 75 insertions, 0 deletions
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt index f62600b983..3e2ac76266 100644 --- a/src/backends/cl/workloads/CMakeLists.txt +++ b/src/backends/cl/workloads/CMakeLists.txt @@ -4,6 +4,8 @@ # list(APPEND armnnClBackendWorkloads_sources + ClAbsWorkload.cpp + ClAbsWorkload.hpp ClActivationWorkload.cpp ClActivationWorkload.hpp ClAdditionWorkload.cpp diff --git a/src/backends/cl/workloads/ClAbsWorkload.cpp b/src/backends/cl/workloads/ClAbsWorkload.cpp new file mode 100644 index 0000000000..058c453c6b --- /dev/null +++ b/src/backends/cl/workloads/ClAbsWorkload.cpp @@ -0,0 +1,44 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClAbsWorkload.hpp" + +#include "ClWorkloadUtils.hpp" + +#include <aclCommon/ArmComputeTensorUtils.hpp> + +#include <cl/ClTensorHandle.hpp> + +#include <boost/cast.hpp> + +namespace armnn +{ + +arm_compute::Status ClAbsWorkloadValidate(const TensorInfo& input, const TensorInfo& output) +{ + const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input); + const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output); + + return arm_compute::CLAbsLayer::validate(&aclInput, &aclOutput); +} + +ClAbsWorkload::ClAbsWorkload(const AbsQueueDescriptor& descriptor, const WorkloadInfo& info) + : BaseWorkload<AbsQueueDescriptor>(descriptor, info) +{ + m_Data.ValidateInputsOutputs("ClAbsWorkload", 1, 1); + + arm_compute::ICLTensor& input = boost::polymorphic_downcast<ClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& output = boost::polymorphic_downcast<ClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + + m_AbsLayer.configure(&input, &output); +} + +void ClAbsWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_CL("ClAbsWorkload_Execute"); + RunClFunction(m_AbsLayer, CHECK_LOCATION()); +} + +} // namespace armnn diff --git a/src/backends/cl/workloads/ClAbsWorkload.hpp b/src/backends/cl/workloads/ClAbsWorkload.hpp new file mode 100644 index 0000000000..763cafcfbd --- /dev/null +++ b/src/backends/cl/workloads/ClAbsWorkload.hpp @@ -0,0 +1,28 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include <backendsCommon/Workload.hpp> + +#include <arm_compute/core/Error.h> +#include <arm_compute/runtime/CL/functions/CLElementWiseUnaryLayer.h> + +namespace armnn +{ + +arm_compute::Status ClAbsWorkloadValidate(const TensorInfo& input, const TensorInfo& output); + +class ClAbsWorkload : public BaseWorkload<AbsQueueDescriptor> +{ +public: + ClAbsWorkload(const AbsQueueDescriptor& descriptor, const WorkloadInfo& info); + virtual void Execute() const override; + +private: + mutable arm_compute::CLAbsLayer m_AbsLayer; +}; + +} // namespace armnn diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp index 1af30ffb34..45030e4f98 100644 --- a/src/backends/cl/workloads/ClWorkloads.hpp +++ b/src/backends/cl/workloads/ClWorkloads.hpp @@ -4,6 +4,7 @@ // #pragma once +#include "ClAbsWorkload.hpp" #include "ClActivationWorkload.hpp" #include "ClAdditionWorkload.hpp" #include "ClConstantWorkload.hpp" |