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author | Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> | 2019-06-26 15:02:47 +0100 |
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committer | Áron Virginás-Tar <aron.virginas-tar@arm.com> | 2019-06-27 11:52:47 +0000 |
commit | 735a450d3b53a2d745b9a7a6d85747e25ec37ede (patch) | |
tree | 4f5af0ddada102cb51fe1f4ba84e3ccf8f51c6ab /src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp | |
parent | 05bf054f40eb551ea76722163b6ed1a1fde7bbf0 (diff) | |
download | armnn-735a450d3b53a2d745b9a7a6d85747e25ec37ede.tar.gz |
IVGCVSW-3320 Add reference workload support for TransposeConvolution2dLayer
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Icc64f8148c9d8a0d14d772e6e4e7865e70585cd9
Diffstat (limited to 'src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp')
-rw-r--r-- | src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp b/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp new file mode 100644 index 0000000000..50dafcac3c --- /dev/null +++ b/src/backends/reference/workloads/RefTransposeConvolution2dWorkload.cpp @@ -0,0 +1,67 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "RefTransposeConvolution2dWorkload.hpp" + +#include "RefWorkloadUtils.hpp" +#include "TransposeConvolution2d.hpp" + +#include <Profiling.hpp> + +namespace armnn +{ + +RefTransposeConvolution2dWorkload::RefTransposeConvolution2dWorkload( + const TransposeConvolution2dQueueDescriptor& descriptor, const WorkloadInfo& info) : + BaseWorkload<TransposeConvolution2dQueueDescriptor>(descriptor, info) +{ + // set up weights decoder + m_Weights = std::make_unique<ScopedCpuTensorHandle>(*(descriptor.m_Weight)); + const TensorInfo& weightsInfo = GetTensorInfo(m_Weights.get()); + + m_WeightsDecoder = MakeDecoder<float>(weightsInfo, m_Weights.get()->Map(true)); + m_WeightsShape = weightsInfo.GetShape(); + + // set up biases decoder + if (descriptor.m_Parameters.m_BiasEnabled) + { + m_Biases = std::make_unique<ScopedCpuTensorHandle>(*(descriptor.m_Bias)); + const TensorInfo& biasesInfo = GetTensorInfo(m_Biases.get()); + m_BiasesDecoder = MakeDecoder<float>(biasesInfo, m_Biases.get()->Map(true)); + } +} + +void RefTransposeConvolution2dWorkload::PostAllocationConfigure() +{ + // set up input decoder + const ITensorHandle* input = m_Data.m_Inputs[0]; + const TensorInfo& inputInfo = GetTensorInfo(input); + + m_InputShape = inputInfo.GetShape(); + m_InputDecoder = MakeDecoder<float>(inputInfo, input->Map()); + + // set up output encoder + ITensorHandle* output = m_Data.m_Outputs[0]; + const TensorInfo& outputInfo = GetTensorInfo(output); + + m_OutputShape = outputInfo.GetShape(); + m_OutputEncoder = MakeEncoder<float>(outputInfo, output->Map()); +} + +void RefTransposeConvolution2dWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefTransposeConvolution2dWorkload_Execute"); + + TransposeConvolution2dImpl(m_Data.m_Parameters, + m_InputShape, + *m_InputDecoder, + m_OutputShape, + *m_OutputEncoder, + m_WeightsShape, + *m_WeightsDecoder, + m_BiasesDecoder.get()); +} + +} // namespace armnn
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