diff options
author | Nattapat Chaimanowong <nattapat.chaimanowong@arm.com> | 2018-10-12 12:02:18 +0100 |
---|---|---|
committer | Matthew Bentham <matthew.bentham@arm.com> | 2018-10-22 16:57:53 +0100 |
commit | 233b3d685b4e4e931e86e021b77ee81d5b818f38 (patch) | |
tree | 5c538b52f0cecbb49a8b1248da60fa1580a16d08 /src/backends/neon/workloads/NeonConstantWorkload.cpp | |
parent | f9aeef0e036df176699aa96d30d2ca8d7546534e (diff) | |
download | armnn-233b3d685b4e4e931e86e021b77ee81d5b818f38.tar.gz |
IVGCVSW-1951 Remove type templating from NeonConstantWorkload
Change-Id: Ib831f02ab6b5d96f1a959187d8f3e694e6257ae5
Diffstat (limited to 'src/backends/neon/workloads/NeonConstantWorkload.cpp')
-rw-r--r-- | src/backends/neon/workloads/NeonConstantWorkload.cpp | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/src/backends/neon/workloads/NeonConstantWorkload.cpp b/src/backends/neon/workloads/NeonConstantWorkload.cpp new file mode 100644 index 0000000000..a3485471c8 --- /dev/null +++ b/src/backends/neon/workloads/NeonConstantWorkload.cpp @@ -0,0 +1,75 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "NeonConstantWorkload.hpp" + +#include <arm_compute/core/Types.h> +#include <armnnUtils/Half.hpp> +#include <backends/aclCommon/ArmComputeTensorUtils.hpp> +#include <backends/neon/NeonTensorHandle.hpp> +#include <backends/CpuTensorHandle.hpp> +#include <backends/Workload.hpp> + +#include <boost/cast.hpp> + +namespace armnn +{ + +NeonConstantWorkload::NeonConstantWorkload(const ConstantQueueDescriptor& descriptor, + const WorkloadInfo& info) + : BaseWorkload<ConstantQueueDescriptor>(descriptor, info) + , m_RanOnce(false) +{ +} + +void NeonConstantWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonConstantWorkload_Execute"); + + using namespace armcomputetensorutils; + + // The intermediate tensor held by the corresponding layer output handler can be initialised with the + // given data on the first inference, then reused for subsequent inferences. + // The initialisation cannot happen at workload construction time since the ACL kernel for the next layer + // may not have been configured at the time. + if (!m_RanOnce) + { + const ConstantQueueDescriptor& data = this->m_Data; + + BOOST_ASSERT(data.m_LayerOutput != nullptr); + arm_compute::ITensor& output = + boost::polymorphic_downcast<NeonTensorHandle*>(data.m_Outputs[0])->GetTensor(); + arm_compute::DataType computeDataType = + boost::polymorphic_downcast<NeonTensorHandle*>(data.m_Outputs[0])->GetDataType(); + + switch (computeDataType) + { + case arm_compute::DataType::F16: + { + CopyArmComputeITensorData(data.m_LayerOutput->GetConstTensor<Half>(), output); + break; + } + case arm_compute::DataType::F32: + { + CopyArmComputeITensorData(data.m_LayerOutput->GetConstTensor<float>(), output); + break; + } + case arm_compute::DataType::QASYMM8: + { + CopyArmComputeITensorData(data.m_LayerOutput->GetConstTensor<uint8_t>(), output); + break; + } + default: + { + BOOST_ASSERT_MSG(false, "Unknown data type"); + break; + } + } + + m_RanOnce = true; + } +} + +} //namespace armnn |