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authorDavid Monahan <david.monahan@arm.com>2023-11-22 13:24:25 +0000
committerDavid Monahan <david.monahan@arm.com>2023-12-07 15:21:09 +0000
commit8a570466aca7ae1619fe8fa715b68419fceb142f (patch)
tree22d80676e01f4a92fc6d927b6c26d6e5939c5170 /src/backends/gpuFsa/workloads
parent748657f2941d28bec810b7eec21e46e288002036 (diff)
downloadarmnn-8a570466aca7ae1619fe8fa715b68419fceb142f.tar.gz
IVGCVSW-8157 - Rebase existing GpuFsa patches to 23.11
Squashed commit of the following: IVGCVSW-7159 Add GpuFsa backend skeleton IVGCVSW-7380 Update the GpuFsa Skeleton to build and load ACL IVGCVSW-7381 Add IsLayerSupported implementation to GpuFsa backend IVGCVSW-7382 Implementation of Conv2d within GpuFsa Signed-off-by: James Conroy <james.conroy@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Id23d9ee598535de7b38a99ca223cdf0ad2102cef
Diffstat (limited to 'src/backends/gpuFsa/workloads')
-rw-r--r--src/backends/gpuFsa/workloads/CMakeLists.txt16
-rw-r--r--src/backends/gpuFsa/workloads/GpuFsaBaseWorkload.hpp39
2 files changed, 55 insertions, 0 deletions
diff --git a/src/backends/gpuFsa/workloads/CMakeLists.txt b/src/backends/gpuFsa/workloads/CMakeLists.txt
new file mode 100644
index 0000000000..4d100123ea
--- /dev/null
+++ b/src/backends/gpuFsa/workloads/CMakeLists.txt
@@ -0,0 +1,16 @@
+#
+# Copyright © 2022-2023 Arm Ltd and Contributors. All rights reserved.
+# SPDX-License-Identifier: MIT
+#
+
+list(APPEND armnnGpuFsaBackendWorkloads_sources
+ GpuFsaBaseWorkload.hpp
+)
+
+add_library(armnnGpuFsaBackendWorkloads OBJECT ${armnnGpuFsaBackendWorkloads_sources})
+target_include_directories(armnnGpuFsaBackendWorkloads PRIVATE ${PROJECT_SOURCE_DIR}/src/armnn)
+target_include_directories(armnnGpuFsaBackendWorkloads PRIVATE ${PROJECT_SOURCE_DIR}/src/armnnUtils)
+target_include_directories(armnnGpuFsaBackendWorkloads PRIVATE ${PROJECT_SOURCE_DIR}/src/backends)
+target_include_directories(armnnGpuFsaBackendWorkloads PRIVATE ${PROJECT_SOURCE_DIR}/src/profiling)
+target_include_directories(armnnGpuFsaBackendWorkloads PRIVATE ${PROJECT_SOURCE_DIR}/profiling/common/include)
+target_include_directories(armnnGpuFsaBackendWorkloads PRIVATE ${PROJECT_SOURCE_DIR}/profiling/client/include)
diff --git a/src/backends/gpuFsa/workloads/GpuFsaBaseWorkload.hpp b/src/backends/gpuFsa/workloads/GpuFsaBaseWorkload.hpp
new file mode 100644
index 0000000000..c274e14665
--- /dev/null
+++ b/src/backends/gpuFsa/workloads/GpuFsaBaseWorkload.hpp
@@ -0,0 +1,39 @@
+//
+// Copyright © 2022-2023 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <armnn/backends/Workload.hpp>
+
+namespace armnn
+{
+
+template <typename QueueDescriptor>
+class GpuFsaBaseWorkload : public BaseWorkload<QueueDescriptor>
+{
+public:
+ GpuFsaBaseWorkload(const QueueDescriptor& descriptor, const WorkloadInfo& info)
+ : BaseWorkload<QueueDescriptor>(descriptor, info)
+ {}
+
+ virtual bool SupportsTensorHandleReplacement() const override
+ {
+ return true;
+ }
+
+ // Replace input tensor handle with the given TensorHandle
+ void ReplaceInputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
+ {
+ this->m_Data.m_Inputs[slot] = tensorHandle;
+ }
+
+ // Replace output tensor handle with the given TensorHandle
+ void ReplaceOutputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
+ {
+ this->m_Data.m_Outputs[slot] = tensorHandle;
+ }
+};
+
+} //namespace armnn \ No newline at end of file