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author | Sadik Armagan <sadik.armagan@arm.com> | 2021-02-09 10:28:54 +0000 |
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committer | Sadik Armagan <sadik.armagan@arm.com> | 2021-02-09 10:31:14 +0000 |
commit | a2747487fbe7eb6d9f5357c6d16c32355ed6e01c (patch) | |
tree | 6f6f8b38100d16f1ec8a0e5be71e8e6ae1cc600a /src/backends/cl/workloads/ClReduceWorkload.cpp | |
parent | ac001eebca101f2df4973d2f1d8cfca026e07419 (diff) | |
download | armnn-a2747487fbe7eb6d9f5357c6d16c32355ed6e01c.tar.gz |
MLCE-347 'REDUCE_MIN, REDUCE_MAX, REDUCE_SUM Support'
* Added TfLiteParser support for REDUCE_MIN and REDUCE_MAX operators
* Added ACL workloads support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators
* Added TfLite Delegate support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I8085d59946bfd4ab78a59a61f899031ae53371a8
Diffstat (limited to 'src/backends/cl/workloads/ClReduceWorkload.cpp')
-rw-r--r-- | src/backends/cl/workloads/ClReduceWorkload.cpp | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/src/backends/cl/workloads/ClReduceWorkload.cpp b/src/backends/cl/workloads/ClReduceWorkload.cpp new file mode 100644 index 0000000000..6f594ff7a9 --- /dev/null +++ b/src/backends/cl/workloads/ClReduceWorkload.cpp @@ -0,0 +1,66 @@ +// +// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClReduceWorkload.hpp" + +#include <cl/ClTensorHandle.hpp> +#include <aclCommon/ArmComputeUtils.hpp> +#include <aclCommon/ArmComputeTensorUtils.hpp> + +#include "ClWorkloadUtils.hpp" + +namespace armnn +{ +using namespace armcomputetensorutils; + +arm_compute::Status ClReduceWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const ReduceDescriptor& desc) +{ + const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input); + const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output); + if (!desc.m_vAxis.empty() && desc.m_vAxis.size() > 1) + { + return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR, + "ClReduceWorkload: Reduction is supported only on 1 axis."); + } + + arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(aclInputInfo.num_dimensions(), + input.GetNumDimensions(), + desc.m_vAxis); + + + return arm_compute::CLReductionOperation::validate(&aclInputInfo, + &aclOutputInfo, + static_cast<unsigned int>(coords[0]), + ConvertReductionOperationToAcl(desc), + desc.m_KeepDims); +} + +ClReduceWorkload::ClReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info) + : BaseWorkload<ReduceQueueDescriptor>(descriptor, info) +{ + m_Data.ValidateInputsOutputs("ClReduceWorkload", 1, 1); + + arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + + arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(input.info()->num_dimensions(), + info.m_InputTensorInfos[0].GetNumDimensions(), + m_Data.m_Parameters.m_vAxis); + m_Layer.configure(&input, + &output, + static_cast<unsigned int>(coords[0]), + ConvertReductionOperationToAcl(m_Data.m_Parameters), + m_Data.m_Parameters.m_KeepDims); +} + +void ClReduceWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_CL("ClReduceWorkload_Execute"); + m_Layer.run(); +} + +} //namespace armnn |