diff options
author | David Beck <david.beck@arm.com> | 2018-09-26 17:41:13 +0100 |
---|---|---|
committer | Matthew Bentham <matthew.bentham@arm.com> | 2018-10-10 16:16:57 +0100 |
commit | ac42efd972b7d03da17f057b2ceaaac5d6e96b1a (patch) | |
tree | 1ebc1320fa3ea7f494d3716ea79a2bda0f4ffd1e /src/backends/cl/workloads/ClDivisionFloatWorkload.cpp | |
parent | bcd3c85b5a7657b38f503676b88a80ae74165acd (diff) | |
download | armnn-ac42efd972b7d03da17f057b2ceaaac5d6e96b1a.tar.gz |
IVGCVSW-1900 : CL backend folder structure
* moving backends/ClWorkloads to backends/cl
* and moving pure Cl workload related code to
backends/cl/workloads
Change-Id: I019a3c6b4da5e7a23074bf03fb057e63199ad129
Diffstat (limited to 'src/backends/cl/workloads/ClDivisionFloatWorkload.cpp')
-rw-r--r-- | src/backends/cl/workloads/ClDivisionFloatWorkload.cpp | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/backends/cl/workloads/ClDivisionFloatWorkload.cpp b/src/backends/cl/workloads/ClDivisionFloatWorkload.cpp new file mode 100644 index 0000000000..a2d8534682 --- /dev/null +++ b/src/backends/cl/workloads/ClDivisionFloatWorkload.cpp @@ -0,0 +1,48 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClDivisionFloatWorkload.hpp" +#include <backends/cl/ClTensorHandle.hpp> +#include <backends/CpuTensorHandle.hpp> + +#include "ClWorkloadUtils.hpp" + +namespace armnn +{ + +arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output) +{ + const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input0); + const arm_compute::TensorInfo aclInput2 = armcomputetensorutils::BuildArmComputeTensorInfo(input1); + const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output); + + return arm_compute::CLArithmeticDivision::validate(&aclInput1, &aclInput2, &aclOutput); +} + + +ClDivisionFloatWorkload::ClDivisionFloatWorkload(const DivisionQueueDescriptor& descriptor, + const WorkloadInfo& info) + : FloatWorkload<DivisionQueueDescriptor>(descriptor, info) +{ + m_Data.ValidateInputsOutputs("ClDivisionFloatWorkload", 2, 1); + + arm_compute::ICLTensor& input0 = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& input1 = static_cast<IClTensorHandle*>(m_Data.m_Inputs[1])->GetTensor(); + arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + // Construct + m_ArithmeticDivision.configure(&input0, &input1, &output); +} + +void ClDivisionFloatWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_CL("ClDivisionFloatWorkload_Execute"); + + // Executes the layer. + m_ArithmeticDivision.run(); +} + +} //namespace armnn |