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author | Teresa Charlin <teresa.charlinreyes@arm.com> | 2020-05-22 18:08:23 +0100 |
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committer | TeresaARM <teresa.charlinreyes@arm.com> | 2020-05-25 18:07:41 +0000 |
commit | ecb6b8e2ef33daf7b5cd6b61cdea5c6339cf9c51 (patch) | |
tree | cf456bdb85d5097c3fef7b4f5b59edfca360450d /src/backends/backendsCommon/test/layerTests/DivisionTestImpl.cpp | |
parent | e300b36606871089d6fec4334a2b5493c7303a94 (diff) | |
download | armnn-ecb6b8e2ef33daf7b5cd6b61cdea5c6339cf9c51.tar.gz |
IVGCVSW-4863 ADD,SUB,DIV,MUL,MAXIMUM and MINIMUM int32 VTS test
skipped in CpuRef
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I1c870ac258e8c3805a95b259cb40731f8e81541e
Diffstat (limited to 'src/backends/backendsCommon/test/layerTests/DivisionTestImpl.cpp')
-rw-r--r-- | src/backends/backendsCommon/test/layerTests/DivisionTestImpl.cpp | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/src/backends/backendsCommon/test/layerTests/DivisionTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/DivisionTestImpl.cpp index 2359f777b8..c52c5ce9f2 100644 --- a/src/backends/backendsCommon/test/layerTests/DivisionTestImpl.cpp +++ b/src/backends/backendsCommon/test/layerTests/DivisionTestImpl.cpp @@ -453,3 +453,104 @@ LayerTestResult<int16_t, 4> DivisionBroadcast1DVectorInt16Test( shape0, output); } + +LayerTestResult<int32_t, 4> DivisionInt32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + const unsigned int width = 2u; + const unsigned int height = 2u; + const unsigned int channelCount = 2u; + const unsigned int batchSize = 2u; + + unsigned int shape[] = { batchSize, channelCount, height, width }; + + std::vector<int32_t> input0 = + { + 8, 8, 8, 8, 6, 6, 6, 6, + 8, 8, 8, 8, 5, 5, 5, 5 + }; + + std::vector<int32_t> input1 = + { + 4, 4, 4, 4, 2, 2, 2, 2, + 2, 2, 2, 2, 1, 1, 1, 1 + }; + + std::vector<int32_t> output = + { + 2, 2, 2, 2, 3, 3, 3, 3, + 4, 4, 4, 4, 5, 5, 5, 5 + }; + + + return ElementwiseTestHelper<4, armnn::DivisionQueueDescriptor, armnn::DataType::Signed32>( + workloadFactory, + memoryManager, + shape, + input0, + shape, + input1, + shape, + output, + 1.f, + 0); +} + +LayerTestResult<int32_t, 4> DivisionBroadcast1ElementInt32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + unsigned int shape0[] = { 1, 2, 2, 2 }; + unsigned int shape1[] = { 1, 1, 1, 1 }; + + std::vector<int32_t> input0 = { 2, 4, 6, 8, 10, 12, 14, 16}; + + std::vector<int32_t> input1 = { 2 }; + + std::vector<int32_t> output = { 1, 2, 3, 4, 5, 6, 7, 8}; + + return ElementwiseTestHelper<4, armnn::DivisionQueueDescriptor, armnn::DataType::Signed32>( + workloadFactory, + memoryManager, + shape0, + input0, + shape1, + input1, + shape0, + output); +} + +LayerTestResult<int32_t, 4> DivisionBroadcast1DVectorInt32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + unsigned int shape0[] = { 1, 3, 3, 2 }; + unsigned int shape1[] = { 1, 1, 1, 2 }; + + std::vector<int32_t> input0 = + { + 1, 4, 3, 8, 5, 12, + 7, 16, 9, 20, 11, 24, + 13, 28, 15, 32, 17, 36 + }; + + std::vector<int32_t> input1 = { 1, 2 }; + + std::vector<int32_t> output = + { + 1, 2, 3, 4, 5, 6, + 7, 8, 9, 10, 11, 12, + 13, 14, 15, 16, 17, 18 + }; + + return ElementwiseTestHelper<4, armnn::DivisionQueueDescriptor, armnn::DataType::Signed32>( + workloadFactory, + memoryManager, + shape0, + input0, + shape1, + input1, + shape0, + output); +}
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