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| author | arovir01 <Aron.Virginas-Tar@arm.com> | 2018-08-31 15:26:35 +0100 |
|---|---|---|
| committer | Matthew Bentham <matthew.bentham@arm.com> | 2018-09-17 17:21:25 +0100 |
| commit | 9e53a35b66b1ec7ceee7c712380a13596175b83b (patch) | |
| tree | d40bf9f27c799184324b6ab91cbb1a546fc4012e /src/armnn/backends/ClWorkloads/ClReshapeFloatWorkload.cpp | |
| parent | 5540d2f379b15503269d1b9b5fbe8fbafd160d2e (diff) | |
| download | armnn-9e53a35b66b1ec7ceee7c712380a13596175b83b.tar.gz | |
IVGCVSW-1784: Rename float32 workloads for ACL
Change-Id: I98bdfe9cb12c663d1d5cfa456e2cc967d70ab22b
Diffstat (limited to 'src/armnn/backends/ClWorkloads/ClReshapeFloatWorkload.cpp')
| -rw-r--r-- | src/armnn/backends/ClWorkloads/ClReshapeFloatWorkload.cpp | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/armnn/backends/ClWorkloads/ClReshapeFloatWorkload.cpp b/src/armnn/backends/ClWorkloads/ClReshapeFloatWorkload.cpp new file mode 100644 index 0000000000..645544b75d --- /dev/null +++ b/src/armnn/backends/ClWorkloads/ClReshapeFloatWorkload.cpp @@ -0,0 +1,31 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// See LICENSE file in the project root for full license information. +// + +#include "ClReshapeFloatWorkload.hpp" +#include "backends/ClTensorHandle.hpp" +#include "backends/CpuTensorHandle.hpp" + +namespace armnn +{ + +ClReshapeFloatWorkload::ClReshapeFloatWorkload(const ReshapeQueueDescriptor& descriptor, const WorkloadInfo& info) + : FloatWorkload<ReshapeQueueDescriptor>(descriptor, info) +{ + m_Data.ValidateInputsOutputs("ClReshapeFloatWorkload", 1, 1); + + arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + + m_Layer.configure(&input, &output); +} + +void ClReshapeFloatWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_CL("ClReshapeFloatWorkload_Execute"); + m_Layer.run(); +} + +} //namespace armnn + |