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author | Teresa Charlin <teresa.charlinreyes@arm.com> | 2022-10-13 15:47:08 +0100 |
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committer | Teresa Charlin <teresa.charlinreyes@arm.com> | 2022-10-28 09:15:30 +0100 |
commit | 0f86ecfce593a302ebd2baf8b70c9f6f50616f81 (patch) | |
tree | bf312b7f8780ccecef54de782ff965c72cf68778 /docs/02_operator_list.dox | |
parent | 20508425bb92623862e4b3f0da1adf46fc541f27 (diff) | |
download | armnn-0f86ecfce593a302ebd2baf8b70c9f6f50616f81.tar.gz |
IVGCVSW-6494 Add CpuAcc Batch MatMul Workload Fp32
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I2def6995f81d33e68f1ea45d8d19a1e6294049b1
Diffstat (limited to 'docs/02_operator_list.dox')
-rw-r--r-- | docs/02_operator_list.dox | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/docs/02_operator_list.dox b/docs/02_operator_list.dox index 658aa07d1d..3a902c8883 100644 --- a/docs/02_operator_list.dox +++ b/docs/02_operator_list.dox @@ -293,12 +293,13 @@ where N = batches, C = channels, H = height, W = width <td>CpuAcc <td> <ul> - <li>N/A + <li>All </ul> <td> - <ul> - <li>N/A - </ul> + <table> + <tr><th> + <tr><td>FLOAT32 + </table> <tr> <td>GpuAcc <td> |