diff options
author | Jim Flynn <jim.flynn@arm.com> | 2021-10-13 21:20:07 +0100 |
---|---|---|
committer | Matthew Sloyan <matthew.sloyan@arm.com> | 2021-11-01 12:09:27 +0000 |
commit | 4b2f34709be018d6cf9931b66deaf84a4469340d (patch) | |
tree | 2320ebf3ee3aeb91b91fb55de16504bd80f6f3a3 /delegate/src/test | |
parent | 9f6862de94e3d15ea5207a5747012f6c7eead358 (diff) | |
download | armnn-4b2f34709be018d6cf9931b66deaf84a4469340d.tar.gz |
IVGCVSW-6457 Add FLOOR_DIV Support to the TfLiteDelegate
Change-Id: Ia4bf42b1f3f86b947825dff8e538d2d4343effab
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Diffstat (limited to 'delegate/src/test')
-rw-r--r-- | delegate/src/test/ElementwiseBinaryTest.cpp | 57 | ||||
-rw-r--r-- | delegate/src/test/ElementwiseBinaryTestHelper.hpp | 6 |
2 files changed, 62 insertions, 1 deletions
diff --git a/delegate/src/test/ElementwiseBinaryTest.cpp b/delegate/src/test/ElementwiseBinaryTest.cpp index 448b3e6fd9..9d03204263 100644 --- a/delegate/src/test/ElementwiseBinaryTest.cpp +++ b/delegate/src/test/ElementwiseBinaryTest.cpp @@ -332,6 +332,43 @@ void DivUint8Test(std::vector<armnn::BackendId>& backends) expectedOutputValues, 0.25f, 0); } +void FloorDivFP32Test(std::vector<armnn::BackendId>& backends) +{ + std::vector<int32_t> input0Shape { 2, 2, 2, 2 }; + std::vector<int32_t> input1Shape { 2, 2, 2, 2 }; + std::vector<int32_t> expectedOutputShape { 2, 2, 2, 2 }; + + std::vector<float> input0Values = + { + -37.5f, -15.2f, -8.76f, -2.0f, -2.6f, -1.0f, -0.8f, 0.0f, + 4.0f, 1.6f, 2.0f, 5.2f, 6.0f, 35.04f, 60.8f, 150.0f + }; + + std::vector<float> input1Values = + { + 1.f, 1.f, 1.f, 1.f, 2.f, 2.f, 2.f, 2.f, + 4.f, 4.f, 4.f, 4.f, 4.f, 4.f, 4.f, 4.f + }; + + std::vector<float> expectedOutputValues = + { + -38.0f, -16.0f, -9.0f, -2.0f, -2.0f, -1.0f, -1.0f, 0.0f, + 1.0f, 0.0f, 0.0f, 1.0f, 1.0f, 8.0f, 15.0f, 37.0f + }; + + ElementwiseBinaryTest<float>(tflite::BuiltinOperator_FLOOR_DIV, + tflite::ActivationFunctionType_NONE, + ::tflite::TensorType_FLOAT32, + backends, + input0Shape, + input1Shape, + expectedOutputShape, + input0Values, + input1Values, + expectedOutputValues); + +} + void MaxFP32Test(std::vector<armnn::BackendId>& backends) { std::vector<int32_t> input0Shape { 2, 2, 2, 2 }; @@ -745,6 +782,12 @@ TEST_CASE ("DIV_Broadcast_GpuAcc_Test") DivBroadcastTest(backends); } +TEST_CASE ("FLOORDIV_FP32_GpuAcc_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc }; + FloorDivFP32Test(backends); +} + TEST_CASE ("MAX_FP32_GpuAcc_Test") { std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc }; @@ -866,6 +909,12 @@ TEST_CASE ("DIV_Broadcast_CpuAcc_Test") DivBroadcastTest(backends); } +TEST_CASE ("FLOORDIV_FP32_CpuAcc_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc }; + FloorDivFP32Test(backends); +} + TEST_CASE ("MAX_FP32_CpuAcc_Test") { std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc }; @@ -992,6 +1041,12 @@ TEST_CASE ("DIV_Broadcast_CpuRef_Test") DivBroadcastTest(backends); } +TEST_CASE ("FLOORDIV_FP32_CpuRef_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef }; + FloorDivFP32Test(backends); +} + TEST_CASE ("DIV_UINT8_CpuRef_Test") { std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef }; @@ -1078,4 +1133,4 @@ TEST_CASE ("SUB_UINT8_CpuRef_Test") } // TEST_SUITE("ElementwiseBinary_CpuRefTests") -} // namespace armnnDelegate
\ No newline at end of file +} // namespace armnnDelegate diff --git a/delegate/src/test/ElementwiseBinaryTestHelper.hpp b/delegate/src/test/ElementwiseBinaryTestHelper.hpp index 13b336e91e..69b0c88dc8 100644 --- a/delegate/src/test/ElementwiseBinaryTestHelper.hpp +++ b/delegate/src/test/ElementwiseBinaryTestHelper.hpp @@ -123,6 +123,12 @@ std::vector<char> CreateElementwiseBinaryTfLiteModel(tflite::BuiltinOperator bin operatorBuiltinOptions = CreateSubOptions(flatBufferBuilder, activationType).Union(); break; } + case BuiltinOperator_FLOOR_DIV: + { + operatorBuiltinOptionsType = tflite::BuiltinOptions_FloorDivOptions; + operatorBuiltinOptions = CreateSubOptions(flatBufferBuilder, activationType).Union(); + break; + } default: break; } |