IVGCVSW-5625 Add support for Float16 to Delegate

 * Float16 unit tests for Reshape
 * Remove unsupported data type from Pad

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ib1804bb6e708a0552fb40d05fe8a6511936f9793

1 files changed, 68 insertions, 0 deletions

diff --git a/delegate/src/test/ReshapeTest.cpp b/delegate/src/test/ReshapeTest.cpp
index 715fed6279..11449e29b8 100644
--- a/delegate/src/test/ReshapeTest.cpp
+++ b/delegate/src/test/ReshapeTest.cpp
@@ -12,6 +12,10 @@
 
 #include <doctest/doctest.h>
 
+#include <half/half.hpp>
+
+using Half = half_float::half;
+
 namespace armnnDelegate
 {
 
@@ -41,6 +45,34 @@ void ReshapeSimpleTest(std::vector<armnn::BackendId>& backends, bool useOption =
                         useOption);
 }
 
+using namespace half_float::literal;
+
+void ReshapeSimpleFloat16Test(std::vector<armnn::BackendId>& backends, bool useOption = true)
+{
+    // Set input data
+    std::vector<int32_t> inputShape { 1, 3, 4, 1 };
+    std::vector<int32_t> outputShape { 1, 3, 2, 2 };
+    std::vector<int32_t> targetShape { 1, 3, 2, 2 };
+
+    std::vector<Half> inputValues = { 5._h, -8._h, -10._h, 7._h,
+                                      8._h, 12._h, -15._h, 2._h,
+                                      3._h, -4._h, -1._h, -11._h };
+
+    std::vector<Half> expectedOutputValues = { 5._h, -8._h, -10._h, 7._h,
+                                               8._h, 12._h, -15._h, 2._h,
+                                               3._h, -4._h, -1._h, -11._h };
+
+    RedefineTest<Half>(tflite::BuiltinOperator_RESHAPE,
+                        ::tflite::TensorType_FLOAT16,
+                        backends,
+                        inputShape,
+                        outputShape,
+                        inputValues,
+                        expectedOutputValues,
+                        targetShape,
+                        useOption);
+}
+
 void ReshapeReduceDimTest(std::vector<armnn::BackendId>& backends, bool useOption = true)
 {
     // Set input data
@@ -242,6 +274,12 @@ TEST_CASE ("Reshape_Uint8_GpuAcc_Test")
     ReshapeUint8Test(backends);
 }
 
+TEST_CASE ("Reshape_Float16_GpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
+    ReshapeSimpleFloat16Test(backends);
+}
+
 TEST_CASE ("Reshape_Simple_ShapeTensor_GpuAcc_Test")
 {
     std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
@@ -278,6 +316,12 @@ TEST_CASE ("Reshape_Uint8_ShapeTensor_GpuAcc_Test")
     ReshapeUint8Test(backends, false);
 }
 
+TEST_CASE ("Reshape_Float16_ShapeTensor_GpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
+    ReshapeSimpleFloat16Test(backends, false);
+}
+
 } // TEST_SUITE("Reshape_GpuAccTests")
 
 TEST_SUITE("Reshape_CpuAccTests")
@@ -319,6 +363,12 @@ TEST_CASE ("Reshape_Uint8_CpuAcc_Test")
     ReshapeUint8Test(backends);
 }
 
+TEST_CASE ("Reshape_Float16_CpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
+    ReshapeSimpleFloat16Test(backends);
+}
+
 TEST_CASE ("Reshape_Simple_ShapeTensor_CpuAcc_Test")
 {
     std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
@@ -355,6 +405,12 @@ TEST_CASE ("Reshape_Uint8_ShapeTensor_CpuAcc_Test")
     ReshapeUint8Test(backends, false);
 }
 
+TEST_CASE ("Reshape_Float16_ShapeTensor_CpuAcc_Test")
+{
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
+    ReshapeSimpleFloat16Test(backends, false);
+}
+
 } // TEST_SUITE("Reshape_CpuAccTests")
 
 TEST_SUITE("Reshape_CpuRefTests")
@@ -402,6 +458,12 @@ TEST_CASE ("Reshape_Int16_CpuRef_Test")
     ReshapeInt16Test(backends);
 }
 
+TEST_CASE ("Reshape_Float16_CpuRef_Test")
+{
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    ReshapeSimpleFloat16Test(backends);
+}
+
 TEST_CASE ("Reshape_Simple_ShapeTensor_CpuRef_Test")
 {
     std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
@@ -444,6 +506,12 @@ TEST_CASE ("Reshape_Int16_ShapeTensor_CpuRef_Test")
     ReshapeInt16Test(backends, false);
 }
 
+TEST_CASE ("Reshape_Float16_ShapeTensor_CpuRef_Test")
+{
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    ReshapeSimpleFloat16Test(backends, false);
+}
+
 } // TEST_SUITE("Reshape_CpuRefTests")
 
 } // namespace armnnDelegate
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