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author | Ryan OShea <Ryan.OShea2@arm.com> | 2020-02-07 17:22:22 +0000 |
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committer | Ryan O'Shea <ryan.oshea2@arm.com> | 2020-02-10 13:37:53 +0000 |
commit | 03181ff73f4b37d2132f15c4bd229a148840cc15 (patch) | |
tree | bd64ca21194b251e151d419d5695419da67d48f8 | |
parent | 9b3e738929b2fc15a1a79b36b21267790ee34cb5 (diff) | |
download | armnn-03181ff73f4b37d2132f15c4bd229a148840cc15.tar.gz |
IVGCVSW-4409 Fix TfLiteParser to handle all datatypes correctly
* Added check for QAsymmS8 datatype for Per-Tensor quantization
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Change-Id: I902aa3863dd5cefdce90e68be8a5750dd6ff9e54
-rw-r--r-- | src/armnnTfLiteParser/TfLiteParser.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/armnnTfLiteParser/TfLiteParser.cpp b/src/armnnTfLiteParser/TfLiteParser.cpp index 10bb0f6e97..560cdf1779 100644 --- a/src/armnnTfLiteParser/TfLiteParser.cpp +++ b/src/armnnTfLiteParser/TfLiteParser.cpp @@ -315,7 +315,14 @@ armnn::TensorInfo ToTensorInfo(TfLiteParser::TensorRawPtr tensorPtr, const std:: type = armnn::DataType::Float32; break; case tflite::TensorType_INT8: - type = armnn::DataType::QSymmS8; + if (tensorPtr->quantization->zero_point.size() == 1 && tensorPtr->quantization->zero_point[0] != 0) + { + type = armnn::DataType::QAsymmS8; + } + else + { + type = armnn::DataType::QSymmS8; + } break; case tflite::TensorType_INT16: type = armnn::DataType::QSymmS16; @@ -359,7 +366,7 @@ armnn::TensorInfo ToTensorInfo(TfLiteParser::TensorRawPtr tensorPtr, const std:: if (tensorPtr->quantization->zero_point.size() == 1) { // NOTE: we lose precision here when converting from 64 bit to 32 - // but this is what we support at the monent in ArmNN + // but this is what we support at the moment in ArmNN quantizationOffset = boost::numeric_cast<int32_t>(tensorPtr->quantization->zero_point[0]); } |