From 44cfd848c1913f87a77c0427450dba93ba47fb94 Mon Sep 17 00:00:00 2001
From: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Date: Fri, 14 Jun 2019 15:45:03 +0100
Subject: IVGCVSW-3283 Add test for converting CONV2D and DEPTHWISE_CONV2D
 operators with dilation params

Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I51a9c71d7a277ab530ac35faea2e8a069c134f45
---
 test/Concurrent.cpp | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

(limited to 'test/Concurrent.cpp')

diff --git a/test/Concurrent.cpp b/test/Concurrent.cpp
index 0848a88c..87ac2e80 100644
--- a/test/Concurrent.cpp
+++ b/test/Concurrent.cpp
@@ -3,13 +3,19 @@
 // SPDX-License-Identifier: MIT
 //
 #include "DriverTestHelpers.hpp"
+
+#include "../1.0/HalPolicy.hpp"
+
 #include <boost/test/unit_test.hpp>
+
 #include <log/log.h>
 
 BOOST_AUTO_TEST_SUITE(ConcurrentDriverTests)
 
-using ArmnnDriver = armnn_driver::ArmnnDriver;
+using ArmnnDriver   = armnn_driver::ArmnnDriver;
 using DriverOptions = armnn_driver::DriverOptions;
+using HalPolicy     = armnn_driver::hal_1_0::HalPolicy;
+
 using namespace android::nn;
 using namespace android::hardware;
 using namespace driverTestHelpers;
@@ -24,22 +30,22 @@ BOOST_AUTO_TEST_CASE(ConcurrentExecute)
     ALOGI("ConcurrentExecute: entry");
 
     auto driver = std::make_unique<ArmnnDriver>(DriverOptions(armnn::Compute::CpuRef));
-    V1_0::Model model = {};
+    HalPolicy::Model model = {};
 
     // add operands
     int32_t actValue      = 0;
     float   weightValue[] = {2, 4, 1};
     float   biasValue[]   = {4};
 
-    AddInputOperand(model, hidl_vec<uint32_t>{1, 3});
-    AddTensorOperand(model, hidl_vec<uint32_t>{1, 3}, weightValue);
-    AddTensorOperand(model, hidl_vec<uint32_t>{1}, biasValue);
-    AddIntOperand(model, actValue);
-    AddOutputOperand(model, hidl_vec<uint32_t>{1, 1});
+    AddInputOperand<HalPolicy>(model, hidl_vec<uint32_t>{1, 3});
+    AddTensorOperand<HalPolicy>(model, hidl_vec<uint32_t>{1, 3}, weightValue);
+    AddTensorOperand<HalPolicy>(model, hidl_vec<uint32_t>{1}, biasValue);
+    AddIntOperand<HalPolicy>(model, actValue);
+    AddOutputOperand<HalPolicy>(model, hidl_vec<uint32_t>{1, 1});
 
     // make the fully connected operation
     model.operations.resize(1);
-    model.operations[0].type = V1_0::OperationType::FULLY_CONNECTED;
+    model.operations[0].type    = HalPolicy::OperationType::FULLY_CONNECTED;
     model.operations[0].inputs  = hidl_vec<uint32_t>{0, 1, 2, 3};
     model.operations[0].outputs = hidl_vec<uint32_t>{4};
 
-- 
cgit v1.2.1