From ba209750abc1ac7e42bab9fef5db284384d70fb3 Mon Sep 17 00:00:00 2001 From: Michael Tyler Date: Thu, 15 Dec 2022 12:39:29 +0000 Subject: Update CPU kernels to remove x19 Resolves: COMPMID-5805 Signed-off-by: Michael Tyler Change-Id: I250f64531e209625e4ff176dd5a552c1c34bc484 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/8909 Tested-by: Arm Jenkins Comments-Addressed: Arm Jenkins Reviewed-by: Gunes Bayir Reviewed-by: Viet-Hoa Do Benchmark: Arm Jenkins --- .../generic.cpp | 274 ++++++++++----------- 1 file changed, 137 insertions(+), 137 deletions(-) (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_u8q_mopa_1VLx4VL') diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_u8q_mopa_1VLx4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_u8q_mopa_1VLx4VL/generic.cpp index 100f15c7e0..d868ed2b67 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_u8q_mopa_1VLx4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_u8q_mopa_1VLx4VL/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -10,16 +10,16 @@ * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. */ #ifdef __ARM_FEATURE_SVE #ifdef ARM_COMPUTE_ENABLE_SME2 @@ -90,107 +90,107 @@ void sme2_interleaved_nomerge_u8q_mopa_1VLx4VL(const uint8_t *const A, const uin KernelArgs args(A, B, C, ldc, M, N, K, bias, rq, n_0, accumulate, accumulator_buffer); __asm__ __volatile__( - "ldr x13, [%x[args], %[offsetof_flags]]\n" + "ldr x14, [%x[args], %[offsetof_flags]]\n" ".inst 0xd503477f // SMSTART ZA\n" "ptrue p1.b\n" ".inst 0x25207811 // ptrue pn9.b\n" + "ldr x13, [%x[args], %[offsetof_accumulator_buffer]]\n" "ldr x11, [%x[args], %[offsetof_accumulator_buffer]]\n" - "ldr x10, [%x[args], %[offsetof_accumulator_buffer]]\n" - "tbz x13, #0, 2f\n" + "tbz x14, #0, 2f\n" "mov x12, #0x0\n" - "cntw x19\n" + "cntw x20\n" "1:" // Initial accumulator load from buffer: Loop - ".inst 0xa040c56c // ld1w { z12.s-z15.s }, pn9.b/Z, [x11]\n" + ".inst 0xa040c5ac // ld1w { z12.s-z15.s }, pn9.b/Z, [x13]\n" ".inst 0xc0840580 // mova za0h.s[x12], { z12.s-z15.s }\n" - ".inst 0xa041c57c // ld1w { z28.s-z31.s }, pn9.b/Z, [x11, #0x4, MUL VL]\n" + ".inst 0xa041c5bc // ld1w { z28.s-z31.s }, pn9.b/Z, [x13, #0x4, MUL VL]\n" ".inst 0xc0840781 // mova za1h.s[x12], { z28.s-z31.s }\n" - ".inst 0xa042c57c // ld1w { z28.s-z31.s }, pn9.b/Z, [x11, #0x8, MUL VL]\n" + ".inst 0xa042c5bc // ld1w { z28.s-z31.s }, pn9.b/Z, [x13, #0x8, MUL VL]\n" ".inst 0xc0840782 // mova za2h.s[x12], { z28.s-z31.s }\n" - ".inst 0xa043c564 // ld1w { z4.s-z7.s }, pn9.b/Z, [x11, #0xc, MUL VL]\n" + ".inst 0xa043c5a4 // ld1w { z4.s-z7.s }, pn9.b/Z, [x13, #0xc, MUL VL]\n" ".inst 0xc0840483 // mova za3h.s[x12], { z4.s-z7.s }\n" "add x12, x12, #0x4\n" - "cmp x12, x19\n" - "addvl x11, x11, #16\n" + "cmp x12, x20\n" + "addvl x13, x13, #16\n" "blt 1b\n" "2:" // Initial accumulator load from buffer: End - "ldr w9, [%x[args], %[offsetof_M]]\n" + "ldr w10, [%x[args], %[offsetof_M]]\n" + "mov x9, #0x0\n" "mov x28, #0x0\n" - "mov x27, #0x0\n" - "ldr w26, [%x[args], %[offsetof_N]]\n" - "ldr x25, [%x[args], %[offsetof_A]]\n" + "ldr w27, [%x[args], %[offsetof_N]]\n" + "ldr x26, [%x[args], %[offsetof_A]]\n" "3:" // M and N loop - "mov x24, x25\n" - ".inst 0x25ba6770 // whilelt pn8.s, x27, x26, VLx4\n" - "tbnz x13, #0, 4f\n" - "ldr x19, [%x[args], %[offsetof_bias]]\n" + "mov x25, x26\n" + ".inst 0x25bb6790 // whilelt pn8.s, x28, x27, VLx4\n" + "tbnz x14, #0, 4f\n" + "ldr x20, [%x[args], %[offsetof_bias]]\n" ".inst 0xc00800ff // zero { zad0, zad1, zad2, zad3, zad4, zad5, zad6, zad7 }\n" - "cbz x19, 5f\n" - ".inst 0xa01bc279 // ldnt1w { z24.s-z27.s }, p8/Z, [x19, x27, LSL #2]\n" + "cbz x20, 5f\n" + ".inst 0xa01cc299 // ldnt1w { z24.s-z27.s }, p8/Z, [x20, x28, LSL #2]\n" ".inst 0xc0902700 // addha za0.s, p1/M, p1/M, z24.s\n" ".inst 0xc0902721 // addha za1.s, p1/M, p1/M, z25.s\n" ".inst 0xc0902742 // addha za2.s, p1/M, p1/M, z26.s\n" ".inst 0xc0902763 // addha za3.s, p1/M, p1/M, z27.s\n" "4:" // Prepare accumulators: Test for last block - "mov x19, x27\n" "mov x20, x28\n" - "incw x19, ALL, MUL #4\n" - "incw x20\n" - "cmp x19, x26\n" - "csel x20, x28, x20, LT\n" - "mov x19, x13\n" - "bfm x13, XZR, #0x0, #0x0 // bfc x13, #0x0, #0x1\n" - "cmp x20, x9\n" - "csel x13, x19, x13, LT\n" + "mov x21, x9\n" + "incw x20, ALL, MUL #4\n" + "incw x21\n" + "cmp x20, x27\n" + "csel x21, x9, x21, LT\n" + "mov x20, x14\n" + "bfm x14, XZR, #0x0, #0x0 // bfc x14, #0x0, #0x1\n" + "cmp x21, x10\n" + "csel x14, x20, x14, LT\n" "5:" // Prepare accumulators: End - "ldr x19, [%x[args], %[offsetof_K]]\n" - "add x19, x19, #0x3\n" - "lsr x19, x19, #0x2\n" - "ldr x22, [%x[args], %[offsetof_B]]\n" - "lsr x21, x19, #0x2\n" - "and x20, x19, #0x3\n" - "ldr x19, [%x[args], %[offsetof_kstride_bytes]]\n" - "madd x22, x27, x19, x22\n" // bptr = B + n * kstride_bytes - "cbz x21, 8f\n" - "subs x21, x21, #0x1\n" - "ld1b { z10.b }, p1/Z, [x24]\n" - ".inst 0xa04086dd // ldnt1b { z28.b-z31.b }, pn9.b/Z, [x22]\n" - "ld1b { z16.b }, p1/Z, [x24, #1, MUL VL]\n" - ".inst 0xa04186cd // ldnt1b { z12.b-z15.b }, pn9.b/Z, [x22, #0x4, MUL VL]\n" - "ld1b { z21.b }, p1/Z, [x24, #2, MUL VL]\n" - ".inst 0xa04286d9 // ldnt1b { z24.b-z27.b }, pn9.b/Z, [x22, #0x8, MUL VL]\n" - "ld1b { z19.b }, p1/Z, [x24, #3, MUL VL]\n" - "addvl x24, x24, #4\n" - ".inst 0xa04386c1 // ldnt1b { z0.b-z3.b }, pn9.b/Z, [x22, #0xc, MUL VL]\n" - "addvl x22, x22, #16\n" + "ldr x20, [%x[args], %[offsetof_K]]\n" + "add x20, x20, #0x3\n" + "lsr x20, x20, #0x2\n" + "ldr x23, [%x[args], %[offsetof_B]]\n" + "lsr x22, x20, #0x2\n" + "and x21, x20, #0x3\n" + "ldr x20, [%x[args], %[offsetof_kstride_bytes]]\n" + "madd x23, x28, x20, x23\n" // bptr = B + n * kstride_bytes + "cbz x22, 8f\n" + "subs x22, x22, #0x1\n" + "ld1b { z10.b }, p1/Z, [x25]\n" + ".inst 0xa04086fd // ldnt1b { z28.b-z31.b }, pn9.b/Z, [x23]\n" + "ld1b { z16.b }, p1/Z, [x25, #1, MUL VL]\n" + ".inst 0xa04186ed // ldnt1b { z12.b-z15.b }, pn9.b/Z, [x23, #0x4, MUL VL]\n" + "ld1b { z21.b }, p1/Z, [x25, #2, MUL VL]\n" + ".inst 0xa04286f9 // ldnt1b { z24.b-z27.b }, pn9.b/Z, [x23, #0x8, MUL VL]\n" + "ld1b { z19.b }, p1/Z, [x25, #3, MUL VL]\n" + "addvl x25, x25, #4\n" + ".inst 0xa04386e1 // ldnt1b { z0.b-z3.b }, pn9.b/Z, [x23, #0xc, MUL VL]\n" + "addvl x23, x23, #16\n" "ble 7f\n" "6:" // K loop ".inst 0xa1bc2540 // umopa za0.s, p1/M, p1/M, z10.b, z28.b\n" - "subs x21, x21, #0x1\n" + "subs x22, x22, #0x1\n" ".inst 0xa1bd2541 // umopa za1.s, p1/M, p1/M, z10.b, z29.b\n" ".inst 0xa1be2542 // umopa za2.s, p1/M, p1/M, z10.b, z30.b\n" ".inst 0xa1bf2543 // umopa za3.s, p1/M, p1/M, z10.b, z31.b\n" - "ld1b { z10.b }, p1/Z, [x24]\n" + "ld1b { z10.b }, p1/Z, [x25]\n" ".inst 0xa1ac2600 // umopa za0.s, p1/M, p1/M, z16.b, z12.b\n" - ".inst 0xa04086dd // ldnt1b { z28.b-z31.b }, pn9.b/Z, [x22]\n" + ".inst 0xa04086fd // ldnt1b { z28.b-z31.b }, pn9.b/Z, [x23]\n" ".inst 0xa1ad2601 // umopa za1.s, p1/M, p1/M, z16.b, z13.b\n" ".inst 0xa1ae2602 // umopa za2.s, p1/M, p1/M, z16.b, z14.b\n" ".inst 0xa1af2603 // umopa za3.s, p1/M, p1/M, z16.b, z15.b\n" - "ld1b { z16.b }, p1/Z, [x24, #1, MUL VL]\n" + "ld1b { z16.b }, p1/Z, [x25, #1, MUL VL]\n" ".inst 0xa1b826a0 // umopa za0.s, p1/M, p1/M, z21.b, z24.b\n" - ".inst 0xa04186cd // ldnt1b { z12.b-z15.b }, pn9.b/Z, [x22, #0x4, MUL VL]\n" + ".inst 0xa04186ed // ldnt1b { z12.b-z15.b }, pn9.b/Z, [x23, #0x4, MUL VL]\n" ".inst 0xa1b926a1 // umopa za1.s, p1/M, p1/M, z21.b, z25.b\n" ".inst 0xa1ba26a2 // umopa za2.s, p1/M, p1/M, z21.b, z26.b\n" ".inst 0xa1bb26a3 // umopa za3.s, p1/M, p1/M, z21.b, z27.b\n" - "ld1b { z21.b }, p1/Z, [x24, #2, MUL VL]\n" - ".inst 0xa04286d9 // ldnt1b { z24.b-z27.b }, pn9.b/Z, [x22, #0x8, MUL VL]\n" + "ld1b { z21.b }, p1/Z, [x25, #2, MUL VL]\n" + ".inst 0xa04286f9 // ldnt1b { z24.b-z27.b }, pn9.b/Z, [x23, #0x8, MUL VL]\n" ".inst 0xa1a02660 // umopa za0.s, p1/M, p1/M, z19.b, z0.b\n" ".inst 0xa1a12661 // umopa za1.s, p1/M, p1/M, z19.b, z1.b\n" ".inst 0xa1a22662 // umopa za2.s, p1/M, p1/M, z19.b, z2.b\n" ".inst 0xa1a32663 // umopa za3.s, p1/M, p1/M, z19.b, z3.b\n" - "ld1b { z19.b }, p1/Z, [x24, #3, MUL VL]\n" - "addvl x24, x24, #4\n" - ".inst 0xa04386c1 // ldnt1b { z0.b-z3.b }, pn9.b/Z, [x22, #0xc, MUL VL]\n" - "addvl x22, x22, #16\n" + "ld1b { z19.b }, p1/Z, [x25, #3, MUL VL]\n" + "addvl x25, x25, #4\n" + ".inst 0xa04386e1 // ldnt1b { z0.b-z3.b }, pn9.b/Z, [x23, #0xc, MUL VL]\n" + "addvl x23, x23, #16\n" "bgt 6b\n" "7:" // K loop tail ".inst 0xa1bc2540 // umopa za0.s, p1/M, p1/M, z10.b, z28.b\n" @@ -210,76 +210,76 @@ void sme2_interleaved_nomerge_u8q_mopa_1VLx4VL(const uint8_t *const A, const uin ".inst 0xa1a22662 // umopa za2.s, p1/M, p1/M, z19.b, z2.b\n" ".inst 0xa1a32663 // umopa za3.s, p1/M, p1/M, z19.b, z3.b\n" "8:" // K oddments - "cbz x20, 10f\n" + "cbz x21, 10f\n" "9:" // K oddments: Loop - "ld1b { z10.b }, p1/Z, [x24]\n" - "subs x20, x20, #0x1\n" - "addvl x24, x24, #1\n" - ".inst 0xa04086dc // ld1b { z28.b-z31.b }, pn9.b/Z, [x22]\n" - "addvl x22, x22, #4\n" + "ld1b { z10.b }, p1/Z, [x25]\n" + "subs x21, x21, #0x1\n" + "addvl x25, x25, #1\n" + ".inst 0xa04086fc // ld1b { z28.b-z31.b }, pn9.b/Z, [x23]\n" + "addvl x23, x23, #4\n" ".inst 0xa1bc2540 // umopa za0.s, p1/M, p1/M, z10.b, z28.b\n" ".inst 0xa1bd2541 // umopa za1.s, p1/M, p1/M, z10.b, z29.b\n" ".inst 0xa1be2542 // umopa za2.s, p1/M, p1/M, z10.b, z30.b\n" ".inst 0xa1bf2543 // umopa za3.s, p1/M, p1/M, z10.b, z31.b\n" "bgt 9b\n" "10:" // K oddments: End - "ld1w { z14.s }, p1/Z, [x24]\n" - "addvl x24, x24, #1\n" + "ld1w { z14.s }, p1/Z, [x25]\n" + "addvl x25, x25, #1\n" ".inst 0xc09125c0 // addva za0.s, p1/M, p1/M, z14.s\n" ".inst 0xc09125c1 // addva za1.s, p1/M, p1/M, z14.s\n" ".inst 0xc09125c2 // addva za2.s, p1/M, p1/M, z14.s\n" ".inst 0xc09125c3 // addva za3.s, p1/M, p1/M, z14.s\n" - "tbz x13, #1, 14f\n" - "tbz x13, #0, 12f\n" + "tbz x14, #1, 14f\n" + "tbz x14, #0, 12f\n" "mov x12, #0x0\n" - "cntw x19\n" + "cntw x20\n" "11:" // Store to partial result buffer: Store and refill: Loop - ".inst 0xa040c578 // ld1w { z24.s-z27.s }, pn9.b/Z, [x11]\n" + ".inst 0xa040c5b8 // ld1w { z24.s-z27.s }, pn9.b/Z, [x13]\n" ".inst 0xc086041c // mova { z28.s-z31.s }, za0h.s[x12]\n" ".inst 0xc0840700 // mova za0h.s[x12], { z24.s-z27.s }\n" ".inst 0xc0860428 // mova { z8.s-z11.s }, za1h.s[x12]\n" - ".inst 0xa041c570 // ld1w { z16.s-z19.s }, pn9.b/Z, [x11, #0x4, MUL VL]\n" + ".inst 0xa041c5b0 // ld1w { z16.s-z19.s }, pn9.b/Z, [x13, #0x4, MUL VL]\n" ".inst 0xc0840601 // mova za1h.s[x12], { z16.s-z19.s }\n" ".inst 0xc0860458 // mova { z24.s-z27.s }, za2h.s[x12]\n" ".inst 0xc086046c // mova { z12.s-z15.s }, za3h.s[x12]\n" - ".inst 0xa042c564 // ld1w { z4.s-z7.s }, pn9.b/Z, [x11, #0x8, MUL VL]\n" + ".inst 0xa042c5a4 // ld1w { z4.s-z7.s }, pn9.b/Z, [x13, #0x8, MUL VL]\n" ".inst 0xc0840482 // mova za2h.s[x12], { z4.s-z7.s }\n" - ".inst 0xa043c564 // ld1w { z4.s-z7.s }, pn9.b/Z, [x11, #0xc, MUL VL]\n" + ".inst 0xa043c5a4 // ld1w { z4.s-z7.s }, pn9.b/Z, [x13, #0xc, MUL VL]\n" ".inst 0xc0840483 // mova za3h.s[x12], { z4.s-z7.s }\n" "add x12, x12, #0x4\n" - "cmp x12, x19\n" - ".inst 0xa060c55c // st1w { z28.s-z31.s }, pn9.b, [x10]\n" + "cmp x12, x20\n" + ".inst 0xa060c57c // st1w { z28.s-z31.s }, pn9.b, [x11]\n" + "addvl x13, x13, #16\n" + ".inst 0xa061c568 // st1w { z8.s-z11.s }, pn9.b, [x11, #0x4, MUL VL]\n" + ".inst 0xa062c578 // st1w { z24.s-z27.s }, pn9.b, [x11, #0x8, MUL VL]\n" + ".inst 0xa063c56c // st1w { z12.s-z15.s }, pn9.b, [x11, #0xc, MUL VL]\n" "addvl x11, x11, #16\n" - ".inst 0xa061c548 // st1w { z8.s-z11.s }, pn9.b, [x10, #0x4, MUL VL]\n" - ".inst 0xa062c558 // st1w { z24.s-z27.s }, pn9.b, [x10, #0x8, MUL VL]\n" - ".inst 0xa063c54c // st1w { z12.s-z15.s }, pn9.b, [x10, #0xc, MUL VL]\n" - "addvl x10, x10, #16\n" "blt 11b\n" "b 21f\n" "12:" // Store to partial result buffer: Store only "mov x12, #0x0\n" - "cntw x19\n" + "cntw x20\n" "13:" // Store to partial result buffer: Store only: Loop ".inst 0xc086041c // mova { z28.s-z31.s }, za0h.s[x12]\n" ".inst 0xc0860420 // mova { z0.s-z3.s }, za1h.s[x12]\n" - ".inst 0xa060c55c // st1w { z28.s-z31.s }, pn9.b, [x10]\n" + ".inst 0xa060c57c // st1w { z28.s-z31.s }, pn9.b, [x11]\n" ".inst 0xc0860448 // mova { z8.s-z11.s }, za2h.s[x12]\n" ".inst 0xc0860470 // mova { z16.s-z19.s }, za3h.s[x12]\n" - ".inst 0xa061c540 // st1w { z0.s-z3.s }, pn9.b, [x10, #0x4, MUL VL]\n" + ".inst 0xa061c560 // st1w { z0.s-z3.s }, pn9.b, [x11, #0x4, MUL VL]\n" "add x12, x12, #0x4\n" - "cmp x12, x19\n" - ".inst 0xa062c548 // st1w { z8.s-z11.s }, pn9.b, [x10, #0x8, MUL VL]\n" - ".inst 0xa063c550 // st1w { z16.s-z19.s }, pn9.b, [x10, #0xc, MUL VL]\n" - "addvl x10, x10, #16\n" + "cmp x12, x20\n" + ".inst 0xa062c568 // st1w { z8.s-z11.s }, pn9.b, [x11, #0x8, MUL VL]\n" + ".inst 0xa063c570 // st1w { z16.s-z19.s }, pn9.b, [x11, #0xc, MUL VL]\n" + "addvl x11, x11, #16\n" "blt 13b\n" "b 21f\n" "14:" // Store to output array - "ldr x23, [%x[args], %[offsetof_C]]\n" - "add x23, x23, x27\n" // C += n - "sub x22, x9, x28\n" + "ldr x24, [%x[args], %[offsetof_C]]\n" + "add x24, x24, x28\n" // C += n + "sub x23, x10, x9\n" "ld1rw { z12.s }, p1/Z, [%x[rq], %[offsetof_Requantize32_per_layer_mul]]\n" - "ldr x21, [%x[args], %[offsetof_ldcb]]\n" - "madd x23, x28, x21, x23\n" // C += m * ldc + "ldr x22, [%x[args], %[offsetof_ldcb]]\n" + "madd x24, x9, x22, x24\n" // C += m * ldc "ld1rw { z13.s }, p1/Z, [%x[rq], %[offsetof_Requantize32_per_layer_mul]]\n" "ld1rw { z14.s }, p1/Z, [%x[rq], %[offsetof_Requantize32_per_layer_mul]]\n" "ld1rw { z15.s }, p1/Z, [%x[rq], %[offsetof_Requantize32_per_layer_mul]]\n" @@ -290,24 +290,24 @@ void sme2_interleaved_nomerge_u8q_mopa_1VLx4VL(const uint8_t *const A, const uin "ld1rw { z1.s }, p1/Z, [%x[rq], %[offsetof_Requantize32_c_offset]]\n" "ld1rw { z21.s }, p1/Z, [%x[rq], %[offsetof_Requantize32_minval]]\n" "ld1rw { z20.s }, p1/Z, [%x[rq], %[offsetof_Requantize32_maxval]]\n" - "tbz x13, #2, 15f\n" - "ldr w20, [%x[args], %[offsetof_n_0]]\n" - "add x20, x20, x27\n" - "ldr x19, [%x[rq], %[offsetof_Requantize32_per_channel_muls]]\n" - "add x19, x19, x20, LSL #2\n" - ".inst 0xa040c26c // ld1w { z12.s-z15.s }, p8/Z, [x19]\n" - "ldr x19, [%x[rq], %[offsetof_Requantize32_per_channel_right_shifts]]\n" - "add x19, x19, x20, LSL #2\n" - ".inst 0xa040c264 // ld1w { z4.s-z7.s }, p8/Z, [x19]\n" + "tbz x14, #2, 15f\n" + "ldr w21, [%x[args], %[offsetof_n_0]]\n" + "add x21, x21, x28\n" + "ldr x20, [%x[rq], %[offsetof_Requantize32_per_channel_muls]]\n" + "add x20, x20, x21, LSL #2\n" + ".inst 0xa040c28c // ld1w { z12.s-z15.s }, p8/Z, [x20]\n" + "ldr x20, [%x[rq], %[offsetof_Requantize32_per_channel_right_shifts]]\n" + "add x20, x20, x21, LSL #2\n" + ".inst 0xa040c284 // ld1w { z4.s-z7.s }, p8/Z, [x20]\n" "15:" // Store to output array: Load per-channel parameters: End - "cntw x19\n" - "whilelt p0.b, x27, x26\n" - "cmp x22, x19\n" - "csel x19, x22, x19, LT\n" - "lsr x20, x19, #0x1\n" + "cntw x20\n" + "whilelt p0.b, x28, x27\n" + "cmp x23, x20\n" + "csel x20, x23, x20, LT\n" + "lsr x21, x20, #0x1\n" "mov x12, #0x0\n" - "and x19, x19, #0x1\n" - "cbz x20, 17f\n" + "and x20, x20, #0x1\n" + "cbz x21, 17f\n" "16:" // Store to output array: Accumulator row 0 loop ".inst 0xc086001a // mova { z26.s-z27.s }, za0h.s[x12, 0:1]\n" ".inst 0xc086005c // mova { z28.s-z29.s }, za1h.s[x12, 0:1]\n" @@ -317,7 +317,7 @@ void sme2_interleaved_nomerge_u8q_mopa_1VLx4VL(const uint8_t *const A, const uin ".inst 0xc1ada41c // sqdmulh { z28.s-z29.s }, { z28.s-z29.s }, z13.s\n" ".inst 0xc1aea416 // sqdmulh { z22.s-z23.s }, { z22.s-z23.s }, z14.s\n" "add x12, x12, #0x2\n" - "cmp x12, x20, LSL #1\n" + "cmp x12, x21, LSL #1\n" ".inst 0xc1afa410 // sqdmulh { z16.s-z17.s }, { z16.s-z17.s }, z15.s\n" ".inst 0xc1a4a23a // srshl { z26.s-z27.s }, { z26.s-z27.s }, z4.s\n" ".inst 0xc1a5a23c // srshl { z28.s-z29.s }, { z28.s-z29.s }, z5.s\n" @@ -336,14 +336,14 @@ void sme2_interleaved_nomerge_u8q_mopa_1VLx4VL(const uint8_t *const A, const uin "uzp1 z18.b, z27.b, z29.b\n" "uzp1 z17.b, z23.b, z17.b\n" "uzp1 z16.b, z19.b, z16.b\n" - "st1b { z16.b }, p0, [x23]\n" - "add x23, x23, x21\n" + "st1b { z16.b }, p0, [x24]\n" + "add x24, x24, x22\n" "uzp1 z16.b, z18.b, z17.b\n" - "st1b { z16.b }, p0, [x23]\n" - "add x23, x23, x21\n" + "st1b { z16.b }, p0, [x24]\n" + "add x24, x24, x22\n" "blt 16b\n" "17:" // Store to output array: Accumulator row 0 oddments - "cbz x19, 18f\n" + "cbz x20, 18f\n" ".inst 0xc0860002 // mova { z2.s-z3.s }, za0h.s[x12, 0:1]\n" ".inst 0xc0860058 // mova { z24.s-z25.s }, za1h.s[x12, 0:1]\n" ".inst 0xc1aca402 // sqdmulh { z2.s-z3.s }, { z2.s-z3.s }, z12.s\n" @@ -367,38 +367,38 @@ void sme2_interleaved_nomerge_u8q_mopa_1VLx4VL(const uint8_t *const A, const uin ".inst 0xc1b4c6aa // sclamp { z10.s-z11.s }, z21.s, z20.s\n" "uzp1 z16.b, z16.b, z10.b\n" "uzp1 z16.b, z23.b, z16.b\n" - "st1b { z16.b }, p0, [x23]\n" + "st1b { z16.b }, p0, [x24]\n" "18:" // Store to output array: Accumulator row 0 oddments: End "19:" // Store to output array: End - "tbz x13, #0, 21f\n" + "tbz x14, #0, 21f\n" "mov x12, #0x0\n" - "cntw x19\n" + "cntw x20\n" "20:" // Store to output array: Refill accumulators: Loop - ".inst 0xa040c570 // ld1w { z16.s-z19.s }, pn9.b/Z, [x11]\n" + ".inst 0xa040c5b0 // ld1w { z16.s-z19.s }, pn9.b/Z, [x13]\n" ".inst 0xc0840600 // mova za0h.s[x12], { z16.s-z19.s }\n" - ".inst 0xa041c56c // ld1w { z12.s-z15.s }, pn9.b/Z, [x11, #0x4, MUL VL]\n" + ".inst 0xa041c5ac // ld1w { z12.s-z15.s }, pn9.b/Z, [x13, #0x4, MUL VL]\n" ".inst 0xc0840581 // mova za1h.s[x12], { z12.s-z15.s }\n" - ".inst 0xa042c570 // ld1w { z16.s-z19.s }, pn9.b/Z, [x11, #0x8, MUL VL]\n" + ".inst 0xa042c5b0 // ld1w { z16.s-z19.s }, pn9.b/Z, [x13, #0x8, MUL VL]\n" ".inst 0xc0840602 // mova za2h.s[x12], { z16.s-z19.s }\n" - ".inst 0xa043c56c // ld1w { z12.s-z15.s }, pn9.b/Z, [x11, #0xc, MUL VL]\n" + ".inst 0xa043c5ac // ld1w { z12.s-z15.s }, pn9.b/Z, [x13, #0xc, MUL VL]\n" ".inst 0xc0840583 // mova za3h.s[x12], { z12.s-z15.s }\n" "add x12, x12, #0x4\n" - "cmp x12, x19\n" - "addvl x11, x11, #16\n" + "cmp x12, x20\n" + "addvl x13, x13, #16\n" "blt 20b\n" "21:" // End block - "incw x27, ALL, MUL #4\n" - "cmp x27, x26\n" + "incw x28, ALL, MUL #4\n" + "cmp x28, x27\n" "blt 3b\n" - "incw x28\n" - "cmp x28, x9\n" - "mov x27, #0x0\n" - "mov x25, x24\n" + "incw x9\n" + "cmp x9, x10\n" + "mov x28, #0x0\n" + "mov x26, x25\n" "blt 3b\n" ".inst 0xd503467f // SMSTOP\n" : : [args] "r" (&args), [offsetof_A] "I" (offsetof(KernelArgs, A)), [offsetof_B] "I" (offsetof(KernelArgs, B)), [offsetof_C] "I" (offsetof(KernelArgs, C)), [offsetof_K] "I" (offsetof(KernelArgs, K)), [offsetof_M] "I" (offsetof(KernelArgs, M)), [offsetof_N] "I" (offsetof(KernelArgs, N)), [offsetof_Requantize32_c_offset] "I" (offsetof(Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [offsetof_accumulator_buffer] "I" (offsetof(KernelArgs, accumulator_buffer)), [offsetof_bias] "I" (offsetof(KernelArgs, bias)), [offsetof_flags] "I" (offsetof(KernelArgs, flags)), [offsetof_kstride_bytes] "I" (offsetof(KernelArgs, kstride_bytes)), [offsetof_ldcb] "I" (offsetof(KernelArgs, ldcb)), [offsetof_n_0] "I" (offsetof(KernelArgs, n_0)), [rq] "r" (&rq) - : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" ); } -- cgit v1.2.1