From 2ecbadada0d2b5e48eb4ffd0ae5e3390c0c96db5 Mon Sep 17 00:00:00 2001 From: Jaroslaw Rzepecki Date: Wed, 29 Nov 2017 13:51:34 +0000 Subject: IVGCVSW-656 : added support (and unit tests) for asymmetric padding in dirct conv (CL) Change-Id: I4b8389376e675bfa93b4a1ae7c8e65b8db1f4c4b Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/111102 Tested-by: BSG Visual Compute Jenkins server to access repositories on http://mpd-gerrit.cambridge.arm.com Reviewed-by: Georgios Pinitas Reviewed-by: Anthony Barbier --- arm_compute/core/CL/kernels/CLDirectConvolutionLayerKernel.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arm_compute/core/CL') diff --git a/arm_compute/core/CL/kernels/CLDirectConvolutionLayerKernel.h b/arm_compute/core/CL/kernels/CLDirectConvolutionLayerKernel.h index 0564553b45..8e3f3d15a2 100644 --- a/arm_compute/core/CL/kernels/CLDirectConvolutionLayerKernel.h +++ b/arm_compute/core/CL/kernels/CLDirectConvolutionLayerKernel.h @@ -93,8 +93,6 @@ private: const ICLTensor *_weights; ICLTensor *_output; BorderSize _border_size; - int _conv_pad_x; - int _conv_pad_y; int _conv_stride_x; int _conv_stride_y; }; -- cgit v1.2.1