Age | Commit message (Collapse) | Author |
|
Introduced F32 accumulation for F16 winograd gemm and output transform
WinogradConvolution will be available for F16 only if fast math flag is enabled
Change-Id: I215593c205236a0f9669218437bb40b184ec6a4f
|
|
Change-Id: I69e995973597ba3927d29e4f6ed5438560e53d77
|
|
In case of CIFG optimisation scratch buffer should have a size of
[batch_size, num_units * 3] else [batch_size, num_units * 4].
Change-Id: I43e46f7b52e791472f1196f36e9142240ba76c5c
|
|
Added test cases to exercise the code path where the reshaping of B is performed on the fly.
Change-Id: Ifa4348e1054dc0019be3927f482adf64b18fd554
|
|
Change-Id: Ib0798cc17496b7817f5b5769b25d98913a33a69d
|
|
Change-Id: I5bf5d751ec7c02d96c26a769f49d03ea23a248b7
|
|
and 8 tensors (Part 1)
Creating special cases for concatening 2 and 4 tensors.
Change-Id: I6a739a494ae45011acb65369e353f9ef96970b90
|
|
The issue was related to CLIm2Col when the number of input channels was less than
the number of elements processed by each thread.
The bug has been fixed in the validate_and_configure_window() function setting the correct number of elements accessed
in the output tensor.
Also fixed an issue GEMM3D when we have a single output channel
Change-Id: I094292d0c7662599c4a4c3916ec5f5821df5faef
|
|
Change-Id: Iac6a95ba7f388e65b7f1c8865c3e9bf289b233ea
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155490
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
OpenCL
COMPMID-1424 - Add dot product support for CLDepthwise QASYMM8 3x3 NHWC non-unit stride
With this patch we are able to improve the performance of MobileNet v1-qasymm8 by 37 %
Tried to use the dot product instruction in CLDepthwise QASYMM8 3x3 NHWC non-unit stride
but I have not seen any benefit (maybe because we have few arithemtic operation and we
do not have more load instructions). However Depthwise convolution has been improved by
30%
Change-Id: Id768a99c2e53a04276707e427af5d0ec93419ada
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155082
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
|
|
Set input range to [-1, 1] in order to avoid inf values
when calculating sqrt.
Change-Id: I18f1e427baa7830fdc587bedf27a92d78c72f49b
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155397
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
Change-Id: I7bd4a8ce81483ba56686b765ca3caabebe42882d
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155000
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
|
|
Change-Id: I91865506166951b3bf7f06a0b2d4cde925cfefb6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153447
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
|
|
Change-Id: Iae22554d5fe893fd22a000eab5bfd8275ea06eb3
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154102
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
Change-Id: I146936c9e98b343496a4b61cdbadf0eaa38e885a
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154008
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
Change-Id: Id974efad304c2513b8824a6561ad45ee60b9e7fb
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153763
Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
COMPMID-1651: Fix QASYMM8 CLDeconvolutionLayer
This patch also extends the range of values used for testing Convolution and
Deconvolution to cover quantized [-1.0f, 1.0f].
Change-Id: I8b280669db67bb3ec25bf5d411c8f5954f5b0dab
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149869
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
Change-Id: Id331199f569f52a37280a9ada5bf84694580b93c
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152843
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
|
|
Change-Id: Ida71312bcf6dbd854f2ab1efc65f74910c79e152
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151510
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
|
|
Change-Id: Ie215daacd10477309dbf8af1bb2b05b7a0a8f203
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150773
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
|
|
Fixing bounds of random values for Normalize Planar YUV tests when using
QASYMM8.
Furthermore, since 70d252d8b4 a QASYMM8 implementation of Batch Normalization
would have been tested with tensors filled with all 1s. This patch removes that
as QASYMM8 Batch Normalization is not supported.
Change-Id: Ieab83ed36b2d7af760ceb19a07d1eedcc991957f
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150492
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
Change-Id: I82d95c4f1c5fed13b213a2591cc2b4e0d0e02a54
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149676
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
Change-Id: Ib14ac821ee5d4aff80bd602cd3e76e7018abb5e6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150268
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
|
|
Change-Id: I9250b2e8020fe87c6ed4de582bbc7460bbd8e94b
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150287
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
|
|
Change-Id: Ic1f9e85306a0a0b1459c9f9aa35bd629deea1710
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148797
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
|
|
Change-Id: I5f719f5b2915c18cd0ca6271db401152112863a6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148982
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com>
|
|
Change-Id: Ifa37a6758f79d0a6ca771dcfb4c55a5d96b452d0
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148892
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
Change-Id: Id7ea6e7f57179478e5ba0e9231274e98fa089590
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148028
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
|
|
Change-Id: I05d21f9a92013ecfd1128d12cf1561cfd6e5c5e9
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147983
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
|
|
Change-Id: Ideead99410e5e0bda1035030af1bbcd0a65ea15e
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/144792
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
|
|
Change-Id: I4a32e47e6d9152633668cf0e14db88fc8c26f7ea
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148167
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
|
|
Change-Id: If7ae0a8b6255a10711365068d9fb153c71f09818
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147751
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
|
|
COMPMID-1589 - Add support for NHWC to CLChannelShuffleLayerKernel
Change-Id: I13936a5cd1659d01fdb10b346e90f0d72d79f1f1
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148475
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
|
|
Change-Id: I6fd83d6584c56a4fd2470948f1987e23237c16d3
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145577
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
|
|
Change-Id: I332c0703e1399fca0c5b724529b54a28f49c88da
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146842
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
|
|
Change-Id: I7422b977538ff29930a90f078badc2edee78af93
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146638
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
|
|
Also extended tests on NEON
Change-Id: Icb0eced534e904ef807972dd3a31988f501bb02e
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147095
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
|
|
Change-Id: I0f31e68dc0a1d6ddec5cd32602b6a3aa62070fe1
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146778
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
|
|
Removes FP16 from HarrisCorners and CannyEdge.
Change-Id: I5e4f9205fdbe4de85f04f55ecf1568c837e56cc0
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146247
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
|
|
Change-Id: Id0754b9e2bc3ef7ff2c4c21c3b89709588c41bd3
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146637
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
|
|
Added support for FP16 in CLWinogradConvolutionLayer: 5x5 kernels and 3x3 kernels(COMPMID-937)
Change-Id: I0f394cbdc978dd04176416e9f612aca3986b09e6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145537
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
|
|
Change-Id: I44369b4a716767163e2233b7d87bff300c523383
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146314
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
|
|
Change-Id: I0dbc4fd7f640d31daa1970eb3da0e941cb771f2b
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146145
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
|
|
Change-Id: I12ba4c0c35f086ea3f395970b85af5bf8f94850b
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145052
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
|
|
Change-Id: If2b44da31fae528c76be742b4b3a21fb0eb06b49
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145284
Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
|
|
The output of NECol2Im is already auto-initialized.
This patch is about calling ShapeCalculator instead of computing the shape inside the kernel, adding validate_and_configure_window, and standardize the way convolved dims are passed (now NEON uses Size2D, while CL passes a pair of uint values: using Size2D for both implementations)
Change-Id: I795696e1b6532f57847c3186c1b532c09f5a25da
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145345
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
|
|
Accuracy issue
Change-Id: Ibbce625251524ee5aa62b15ac78ba0f70efcc7bc
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145585
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
|
|
Change-Id: I99ebae61024a7bce9d17292a02c28626ae6c29d5
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/144872
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
|
|
On GEMM we had accuracy issue
On Magnitude we have disabled the fp16 acceleration since we do not have feature parity with CL
and this function is not used for ML
Change-Id: Iaebe3bbbd2a9f45db0c714aa5ebaf48eb0b65741
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145467
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
|
|
Change-Id: Id978c34889b86fa8b9184d3349cc9b12837141a2
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145403
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
|