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There were mismatches when using kernel size 5 and padding = SAME
Change-Id: Id834e96ebcf665616f99c995b48e302dcff8dc48
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/121144
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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This reverts commit 9a0875951d43dda035f32d2e0728cf59d80cb4d3.
Change-Id: I6af0bc64c656f91cf1e0357f8760defa08f2e78d
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/121190
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Anthony Barbier <anthony.barbier@arm.com>
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padding
Currently an assert gets fired in debug mode, and we just ignore the asymmetric padding in release mode.
Change-Id: Ia6278b5722f7e93f356a975ab3243e6bb07e44a8
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/120840
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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sizes - Part 2 (NEON)
Change-Id: I64bc8e3f71236edb71494f431ee34077eb8814ca
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118203
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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a) Added support for kernel size 5.
b) Templatised data type for transforms and batched gemms kernels.
Change-Id: Idb83dda7a5eec19e015888ab31902bd791913297
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/120540
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I6413a05f6870a0d04f12d7348269b15297ae8493
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/114696
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I5a6413548b2c9b8972c91ddba57395509dffd87e
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/120656
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: Iea4c4732d19e8cf9b245ac2a9f75b2aa70a5839e
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118149
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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If permutation vector is bigger than the tensorshape to permute then
infer dimensions of size one for the extra dimensions.
Change-Id: I5addb292f770d925f47f756902e16073039e8f71
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/120473
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Stefana Simion <stefana.simion@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I4083e8d16bb23933634f229a1408dfd0e8f2922a
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/120069
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I258f03b61446e8333645efe80f2857e8c725b9de
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118943
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I9d8eaadc1fa32716c109e64c9a8793d9b6f8cc6e
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/119746
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: Ida1e9a836bc518bfe5563e16bf7f92bde5fc13f7
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118472
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
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Change-Id: Iaae87e155fa673bf099c2bc21a7be072c5c08fc1
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/119118
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
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Change-Id: Ifa74e2bf05546de9a49aa185e22fba50438d8ad6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/113946
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
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Change-Id: I470f244718571e32ac55062b2b62fd0f6996efc6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118940
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Change-Id: Ib8100e7c659c49694c746fa3f36ce20f44f6929f
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/117804
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: Iebd2a8fece1af87c93d6795e176d8c37ca64bbf6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118187
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: Ie4ac7f61675c1fb9b1748d6784fccb26f058832a
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118635
Reviewed-by: Robert Hughes <robert.hughes@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I83d0f2bc8e0ebfdc0b60931f2c5acf0469caf886
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118696
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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1) Removed the example files winograd_layer.hpp/cpp
2) Teplatized winograd transform kernels
Change-Id: I7045fa0b801b9d30a11275914aaa2dafd254aed2
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118332
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Also, added instrumentation to support generic tensor broadcasting for
NEON and CL backends.
Change-Id: I1bc5747a286e1a4b464c209067581e103d473b9a
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/114201
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: Icbb43de7642e2b433d7471d70b9dbbde850989d3
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118197
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
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Change-Id: I2d3cc9668852a1ba414fc3148866df408f770dc8
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118308
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I38ae204632ae27c5fe7a0131462343397899868c
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118120
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: Iff50adf2993bd69c2696a47559d6b2e0011fed87
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/110177
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Some minor improvements in the test fixture, for example making sure
the values in the mapx and mapy tensors are in the range of [-5, in_width+5]
and [-5,in_height].
Tolerance was changed to 0, no mismatches expected.
Change-Id: I2fad06defb293bf9fdd1988799b19547c102dee5
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118044
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I4f2cca52caf210fdb7d6bb7e9436ac51cb5088b4
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/112398
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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1) Updated to the latest code from the RSH repo.
2) Moved winograd transforms into kernels.
3) Added support for biases
Change-Id: I7f39f34a599b49d7d9b549cc10a4f4d4a8007ab8
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/117474
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I33cf54e68f6c097ac58b6f16c3f9a720978f09cd
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/117289
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: Iec82a91ad351cfe8d07d0976a24bd42f4703177a
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/116833
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
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it supports asymmetric padding
Add asymmetric padding support for NEPoolingLayer
Change-Id: Ia5cc660aeca636c3c45df4916a28974cc2b7f2f4
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/117275
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Cortex-A55r1.
Change-Id: I640ae54dcc4591915c7a539b27728f05b70cf0eb
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/117616
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I7197d2ad7ac08112eba1570a257ad011b1ce0b75
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/117404
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I35f429fbf08dece7c759242c37e0a68b0851ce49
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/117231
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I86d7f53b5f5d1dbc22078aea5c32b08a25d1f49e
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/116634
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I1a9ed6c3420ddf8978aeaad48d9915333b006b49
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/116374
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Also, add validation test that hits the discovered failure for CL.
Change-Id: I5573e0a3f169b85d5fb7299e7c48d74be7165208
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/112717
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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- NEDirectConvolutionLayer
- NEDepthwiseConvolutionLayer3x3
Change-Id: Id4d7d17ee334639c059015a290b8fc34712706ee
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/115430
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Adds generic pooling case for QASYMM8
Change-Id: I37d38a92ca61651e915fbbbb6da88e180390b4ab
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/115439
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: I91e39713ffa580e9d2213988ad3517a8a41bf4e8
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/114013
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: Ie00c6b08a51d30c5ce2637d40ee3d165b8a68686
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/110311
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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CustomConvolutionRectangle
Change-Id: I108a48ad5e6dc3f331fd5ceb38ced8ccdb31d81a
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/113130
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: If72b649fce21d0b8b9c28a1b064c4cf5adb06c15
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/115502
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Removed the code that created a subtensor and imported memory from the workspace in the function run() method.
The subtensor is no longer needed because we perform the reordering of the tensors with NEPermute. The call to the method
winograd::Winograd2x2_3x3GEMM<TOut, TIn>::reshape_output() will transform the results from the winograd domain
into the spatial domain and this will be stored in the member _output_nhwc.
Change-Id: Iae09d26c7587cd2eed98968c3ce214e20031038e
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/115483
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Renamed BiasAccumulateKernel to OutputStage. If no bias is provided
when the input is quantized, the kernel simply downscales the input.
Throw error if no bias is provided and input is floating point.
Change-Id: I645a4ee9c6014b0547778fdd92c9ec72ef2f0aab
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/114158
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: Iecbfa3ebab890c778fb475403466d6fb168e9968
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/113357
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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NEGEMMLowpAArch64V8P4Kernel
Change-Id: If32cbdc65f2e1441595cae5b4824a9b4357c8bf6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/113467
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Input reordering from NCHW to NHWC
Output reordering from NHWC to NCHW
Weights reordering from [Ofm x Ifm x Height x Width] to [Height x Width x Ifm x Ofm]
Change-Id: I85aabedb1f9c13700bc4919eb3130f4d4bd0b465
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/113631
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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-Propagates hints to subgraph.
-Fixes dispatching of apropriate optimized DepthwiseConvolution kernel
for OpenCL backend. NEON backend is altered to default to the generic
case until COMPMID-769 is addressed.
Change-Id: I544f05cd99a9ac253f1b19aa4e4bb222b8fdd087
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/114781
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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