diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL/generic.cpp | 221 |
1 files changed, 111 insertions, 110 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL/generic.cpp index ad10ce7993..832fd0998a 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023 Arm Limited. + * Copyright (c) 2023-2024 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -10,18 +10,18 @@ * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SME2 #include "arm_gemm.hpp" @@ -89,6 +89,7 @@ void sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL(const __fp16 *const A, c const __fp16 *const bias; + float *const accumulator_buffer; uint64_t flags; }; @@ -108,14 +109,14 @@ void sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL(const __fp16 *const A, c "cntw x20\n" "1:" // Initial accumulator load from buffer: Loop ".inst 0xa040c578 // ld1w { z24.s-z27.s }, pn9.b/Z, [x11]\n" - ".inst 0xa041c570 // ld1w { z16.s-z19.s }, pn9.b/Z, [x11, #0x4, MUL VL]\n" - ".inst 0xa042c564 // ld1w { z4.s-z7.s }, pn9.b/Z, [x11, #0x8, MUL VL]\n" - ".inst 0xa043c574 // ld1w { z20.s-z23.s }, pn9.b/Z, [x11, #0xc, MUL VL]\n" + ".inst 0xa041c568 // ld1w { z8.s-z11.s }, pn9.b/Z, [x11, #0x4, MUL VL]\n" + ".inst 0xa042c57c // ld1w { z28.s-z31.s }, pn9.b/Z, [x11, #0x8, MUL VL]\n" + ".inst 0xa043c564 // ld1w { z4.s-z7.s }, pn9.b/Z, [x11, #0xc, MUL VL]\n" ".inst 0xc0840700 // mova za0h.s[x12], { z24.s-z27.s }\n" "addvl x11, x11, #16\n" - ".inst 0xc0840601 // mova za1h.s[x12], { z16.s-z19.s }\n" - ".inst 0xc0840482 // mova za2h.s[x12], { z4.s-z7.s }\n" - ".inst 0xc0840683 // mova za3h.s[x12], { z20.s-z23.s }\n" + ".inst 0xc0840501 // mova za1h.s[x12], { z8.s-z11.s }\n" + ".inst 0xc0840782 // mova za2h.s[x12], { z28.s-z31.s }\n" + ".inst 0xc0840483 // mova za3h.s[x12], { z4.s-z7.s }\n" "add x12, x12, #0x4\n" "cmp x12, x20\n" "blt 1b\n" @@ -132,17 +133,17 @@ void sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL(const __fp16 *const A, c ".inst 0xc00800ff // zero { zad0, zad1, zad2, zad3, zad4, zad5, zad6, zad7 }\n" "cbz x20, 5f\n" ".inst 0x257a4770 // whilelt pn8.h, x27, x26, VLx2\n" - "fmov z6.h, #0.0\n" - "fmov z19.h, #1.0\n" - ".inst 0xa01b2295 // ldnt1h { z20.h-z21.h }, p8/Z, [x20, x27, LSL #1]\n" - "zip1 z23.h, z20.h, z6.h\n" - "zip2 z12.h, z20.h, z6.h\n" - "zip1 z16.h, z21.h, z6.h\n" - "zip2 z8.h, z21.h, z6.h\n" - ".inst 0x81b70260 // fmopa za0.s, p0/M, p0/M, z19.h, z23.h\n" - ".inst 0x81ac0261 // fmopa za1.s, p0/M, p0/M, z19.h, z12.h\n" - ".inst 0x81b00262 // fmopa za2.s, p0/M, p0/M, z19.h, z16.h\n" - ".inst 0x81a80263 // fmopa za3.s, p0/M, p0/M, z19.h, z8.h\n" + "fmov z29.h, #0.0\n" + "fmov z2.h, #1.0\n" + ".inst 0xa01b229f // ldnt1h { z30.h-z31.h }, p8/Z, [x20, x27, LSL #1]\n" + "zip1 z22.h, z30.h, z29.h\n" + "zip2 z30.h, z30.h, z29.h\n" + "zip1 z20.h, z31.h, z29.h\n" + "zip2 z19.h, z31.h, z29.h\n" + ".inst 0x81b60040 // fmopa za0.s, p0/M, p0/M, z2.h, z22.h\n" + ".inst 0x81be0041 // fmopa za1.s, p0/M, p0/M, z2.h, z30.h\n" + ".inst 0x81b40042 // fmopa za2.s, p0/M, p0/M, z2.h, z20.h\n" + ".inst 0x81b30043 // fmopa za3.s, p0/M, p0/M, z2.h, z19.h\n" "4:" // Prepare accumulators: Test for last block "mov x20, x27\n" "mov x21, x28\n" @@ -161,79 +162,79 @@ void sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL(const __fp16 *const A, c "add x20, x20, #0x1\n" "lsr x20, x20, #0x1\n" "lsr x21, x20, #0x2\n" - "and x20, x20, #0x3\n" "madd x23, x27, x22, x23\n" // bptr = B + n * kstride_bytes + "and x20, x20, #0x3\n" "cbz x21, 8f\n" "subs x21, x21, #0x1\n" - "ld1h { z21.h }, p0/Z, [x24]\n" - ".inst 0xa140a6f8 // ldnt1h { z16.h, z20.h, z24.h, z28.h }, pn9.b/Z, [x23]\n" - "ld1h { z29.h }, p0/Z, [x24, #1, MUL VL]\n" - ".inst 0xa041a6ed // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x23, #0x4, MUL VL]\n" - "ld1h { z4.h }, p0/Z, [x24, #2, MUL VL]\n" - ".inst 0xa042a6e1 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x23, #0x8, MUL VL]\n" - "ld1h { z25.h }, p0/Z, [x24, #3, MUL VL]\n" + "ld1h { z20.h }, p0/Z, [x24]\n" + ".inst 0xa040a6f0 // ld1h { z16.h-z19.h }, pn9.b/Z, [x23]\n" + "ld1h { z31.h }, p0/Z, [x24, #1, MUL VL]\n" + ".inst 0xa141a6e2 // ld1h { z2.h, z6.h, z10.h, z14.h }, pn9.b/Z, [x23, #0x4, MUL VL]\n" + "ld1h { z28.h }, p0/Z, [x24, #2, MUL VL]\n" + ".inst 0xa042a6f8 // ld1h { z24.h-z27.h }, pn9.b/Z, [x23, #0x8, MUL VL]\n" + "ld1h { z22.h }, p0/Z, [x24, #3, MUL VL]\n" "addvl x24, x24, #4\n" - ".inst 0xa143a6fb // ldnt1h { z19.h, z23.h, z27.h, z31.h }, pn9.b/Z, [x23, #0xc, MUL VL]\n" + ".inst 0xa143a6e1 // ld1h { z1.h, z5.h, z9.h, z13.h }, pn9.b/Z, [x23, #0xc, MUL VL]\n" "addvl x23, x23, #16\n" "ble 7f\n" "6:" // K loop - ".inst 0x81b002a0 // fmopa za0.s, p0/M, p0/M, z21.h, z16.h\n" + ".inst 0x81b00280 // fmopa za0.s, p0/M, p0/M, z20.h, z16.h\n" "subs x21, x21, #0x1\n" - ".inst 0x81b402a1 // fmopa za1.s, p0/M, p0/M, z21.h, z20.h\n" - ".inst 0x81b802a2 // fmopa za2.s, p0/M, p0/M, z21.h, z24.h\n" - ".inst 0x81bc02a3 // fmopa za3.s, p0/M, p0/M, z21.h, z28.h\n" - "ld1h { z21.h }, p0/Z, [x24]\n" - ".inst 0x81ac03a0 // fmopa za0.s, p0/M, p0/M, z29.h, z12.h\n" - ".inst 0xa140a6f0 // ld1h { z16.h, z20.h, z24.h, z28.h }, pn9.b/Z, [x23]\n" - ".inst 0x81ad03a1 // fmopa za1.s, p0/M, p0/M, z29.h, z13.h\n" - ".inst 0x81ae03a2 // fmopa za2.s, p0/M, p0/M, z29.h, z14.h\n" - ".inst 0x81af03a3 // fmopa za3.s, p0/M, p0/M, z29.h, z15.h\n" - "ld1h { z29.h }, p0/Z, [x24, #1, MUL VL]\n" - ".inst 0x81a00080 // fmopa za0.s, p0/M, p0/M, z4.h, z0.h\n" - ".inst 0xa041a6ec // ld1h { z12.h-z15.h }, pn9.b/Z, [x23, #0x4, MUL VL]\n" - ".inst 0x81a10081 // fmopa za1.s, p0/M, p0/M, z4.h, z1.h\n" - ".inst 0x81a20082 // fmopa za2.s, p0/M, p0/M, z4.h, z2.h\n" - ".inst 0x81a30083 // fmopa za3.s, p0/M, p0/M, z4.h, z3.h\n" - "ld1h { z4.h }, p0/Z, [x24, #2, MUL VL]\n" - ".inst 0xa042a6e0 // ld1h { z0.h-z3.h }, pn9.b/Z, [x23, #0x8, MUL VL]\n" - ".inst 0x81b30320 // fmopa za0.s, p0/M, p0/M, z25.h, z19.h\n" - ".inst 0x81b70321 // fmopa za1.s, p0/M, p0/M, z25.h, z23.h\n" - ".inst 0x81bb0322 // fmopa za2.s, p0/M, p0/M, z25.h, z27.h\n" - ".inst 0x81bf0323 // fmopa za3.s, p0/M, p0/M, z25.h, z31.h\n" - "ld1h { z25.h }, p0/Z, [x24, #3, MUL VL]\n" + ".inst 0x81b10281 // fmopa za1.s, p0/M, p0/M, z20.h, z17.h\n" + ".inst 0x81b20282 // fmopa za2.s, p0/M, p0/M, z20.h, z18.h\n" + ".inst 0x81b30283 // fmopa za3.s, p0/M, p0/M, z20.h, z19.h\n" + "ld1h { z20.h }, p0/Z, [x24]\n" + ".inst 0x81a203e0 // fmopa za0.s, p0/M, p0/M, z31.h, z2.h\n" + ".inst 0xa040a6f0 // ld1h { z16.h-z19.h }, pn9.b/Z, [x23]\n" + ".inst 0x81a603e1 // fmopa za1.s, p0/M, p0/M, z31.h, z6.h\n" + ".inst 0x81aa03e2 // fmopa za2.s, p0/M, p0/M, z31.h, z10.h\n" + ".inst 0x81ae03e3 // fmopa za3.s, p0/M, p0/M, z31.h, z14.h\n" + "ld1h { z31.h }, p0/Z, [x24, #1, MUL VL]\n" + ".inst 0x81b80380 // fmopa za0.s, p0/M, p0/M, z28.h, z24.h\n" + ".inst 0xa141a6e2 // ld1h { z2.h, z6.h, z10.h, z14.h }, pn9.b/Z, [x23, #0x4, MUL VL]\n" + ".inst 0x81b90381 // fmopa za1.s, p0/M, p0/M, z28.h, z25.h\n" + ".inst 0x81ba0382 // fmopa za2.s, p0/M, p0/M, z28.h, z26.h\n" + ".inst 0x81bb0383 // fmopa za3.s, p0/M, p0/M, z28.h, z27.h\n" + "ld1h { z28.h }, p0/Z, [x24, #2, MUL VL]\n" + ".inst 0xa042a6f8 // ld1h { z24.h-z27.h }, pn9.b/Z, [x23, #0x8, MUL VL]\n" + ".inst 0x81a102c0 // fmopa za0.s, p0/M, p0/M, z22.h, z1.h\n" + ".inst 0x81a502c1 // fmopa za1.s, p0/M, p0/M, z22.h, z5.h\n" + ".inst 0x81a902c2 // fmopa za2.s, p0/M, p0/M, z22.h, z9.h\n" + ".inst 0x81ad02c3 // fmopa za3.s, p0/M, p0/M, z22.h, z13.h\n" + "ld1h { z22.h }, p0/Z, [x24, #3, MUL VL]\n" "addvl x24, x24, #4\n" - ".inst 0xa143a6f3 // ld1h { z19.h, z23.h, z27.h, z31.h }, pn9.b/Z, [x23, #0xc, MUL VL]\n" + ".inst 0xa143a6e1 // ld1h { z1.h, z5.h, z9.h, z13.h }, pn9.b/Z, [x23, #0xc, MUL VL]\n" "addvl x23, x23, #16\n" "bgt 6b\n" "7:" // K loop tail - ".inst 0x81b002a0 // fmopa za0.s, p0/M, p0/M, z21.h, z16.h\n" - ".inst 0x81b402a1 // fmopa za1.s, p0/M, p0/M, z21.h, z20.h\n" - ".inst 0x81b802a2 // fmopa za2.s, p0/M, p0/M, z21.h, z24.h\n" - ".inst 0x81bc02a3 // fmopa za3.s, p0/M, p0/M, z21.h, z28.h\n" - ".inst 0x81ac03a0 // fmopa za0.s, p0/M, p0/M, z29.h, z12.h\n" - ".inst 0x81ad03a1 // fmopa za1.s, p0/M, p0/M, z29.h, z13.h\n" - ".inst 0x81ae03a2 // fmopa za2.s, p0/M, p0/M, z29.h, z14.h\n" - ".inst 0x81af03a3 // fmopa za3.s, p0/M, p0/M, z29.h, z15.h\n" - ".inst 0x81a00080 // fmopa za0.s, p0/M, p0/M, z4.h, z0.h\n" - ".inst 0x81a10081 // fmopa za1.s, p0/M, p0/M, z4.h, z1.h\n" - ".inst 0x81a20082 // fmopa za2.s, p0/M, p0/M, z4.h, z2.h\n" - ".inst 0x81a30083 // fmopa za3.s, p0/M, p0/M, z4.h, z3.h\n" - ".inst 0x81b30320 // fmopa za0.s, p0/M, p0/M, z25.h, z19.h\n" - ".inst 0x81b70321 // fmopa za1.s, p0/M, p0/M, z25.h, z23.h\n" - ".inst 0x81bb0322 // fmopa za2.s, p0/M, p0/M, z25.h, z27.h\n" - ".inst 0x81bf0323 // fmopa za3.s, p0/M, p0/M, z25.h, z31.h\n" + ".inst 0x81b00280 // fmopa za0.s, p0/M, p0/M, z20.h, z16.h\n" + ".inst 0x81b10281 // fmopa za1.s, p0/M, p0/M, z20.h, z17.h\n" + ".inst 0x81b20282 // fmopa za2.s, p0/M, p0/M, z20.h, z18.h\n" + ".inst 0x81b30283 // fmopa za3.s, p0/M, p0/M, z20.h, z19.h\n" + ".inst 0x81a203e0 // fmopa za0.s, p0/M, p0/M, z31.h, z2.h\n" + ".inst 0x81a603e1 // fmopa za1.s, p0/M, p0/M, z31.h, z6.h\n" + ".inst 0x81aa03e2 // fmopa za2.s, p0/M, p0/M, z31.h, z10.h\n" + ".inst 0x81ae03e3 // fmopa za3.s, p0/M, p0/M, z31.h, z14.h\n" + ".inst 0x81b80380 // fmopa za0.s, p0/M, p0/M, z28.h, z24.h\n" + ".inst 0x81b90381 // fmopa za1.s, p0/M, p0/M, z28.h, z25.h\n" + ".inst 0x81ba0382 // fmopa za2.s, p0/M, p0/M, z28.h, z26.h\n" + ".inst 0x81bb0383 // fmopa za3.s, p0/M, p0/M, z28.h, z27.h\n" + ".inst 0x81a102c0 // fmopa za0.s, p0/M, p0/M, z22.h, z1.h\n" + ".inst 0x81a502c1 // fmopa za1.s, p0/M, p0/M, z22.h, z5.h\n" + ".inst 0x81a902c2 // fmopa za2.s, p0/M, p0/M, z22.h, z9.h\n" + ".inst 0x81ad02c3 // fmopa za3.s, p0/M, p0/M, z22.h, z13.h\n" "8:" // K oddments "cbz x20, 10f\n" "9:" // K oddments: Loop - "ld1h { z21.h }, p0/Z, [x24]\n" + "ld1h { z10.h }, p0/Z, [x24]\n" "subs x20, x20, #0x1\n" "addvl x24, x24, #1\n" - ".inst 0xa140a6f0 // ld1h { z16.h, z20.h, z24.h, z28.h }, pn9.b/Z, [x23]\n" + ".inst 0xa140a6f3 // ld1h { z19.h, z23.h, z27.h, z31.h }, pn9.b/Z, [x23]\n" "addvl x23, x23, #4\n" - ".inst 0x81b002a0 // fmopa za0.s, p0/M, p0/M, z21.h, z16.h\n" - ".inst 0x81b402a1 // fmopa za1.s, p0/M, p0/M, z21.h, z20.h\n" - ".inst 0x81b802a2 // fmopa za2.s, p0/M, p0/M, z21.h, z24.h\n" - ".inst 0x81bc02a3 // fmopa za3.s, p0/M, p0/M, z21.h, z28.h\n" + ".inst 0x81b30140 // fmopa za0.s, p0/M, p0/M, z10.h, z19.h\n" + ".inst 0x81b70141 // fmopa za1.s, p0/M, p0/M, z10.h, z23.h\n" + ".inst 0x81bb0142 // fmopa za2.s, p0/M, p0/M, z10.h, z27.h\n" + ".inst 0x81bf0143 // fmopa za3.s, p0/M, p0/M, z10.h, z31.h\n" "bgt 9b\n" "10:" // K oddments: End "tbz x13, #1, 14f\n" @@ -241,21 +242,21 @@ void sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL(const __fp16 *const A, c "mov x12, #0x0\n" "cntw x20\n" "11:" // Store to partial result buffer: Store and refill: Loop - ".inst 0xa040c574 // ld1w { z20.s-z23.s }, pn9.b/Z, [x11]\n" - ".inst 0xc0860400 // mova { z0.s-z3.s }, za0h.s[x12]\n" + ".inst 0xa040c570 // ld1w { z16.s-z19.s }, pn9.b/Z, [x11]\n" + ".inst 0xc0860414 // mova { z20.s-z23.s }, za0h.s[x12]\n" ".inst 0xc0860438 // mova { z24.s-z27.s }, za1h.s[x12]\n" - ".inst 0xa041c56c // ld1w { z12.s-z15.s }, pn9.b/Z, [x11, #0x4, MUL VL]\n" + ".inst 0xa041c560 // ld1w { z0.s-z3.s }, pn9.b/Z, [x11, #0x4, MUL VL]\n" ".inst 0xc0860444 // mova { z4.s-z7.s }, za2h.s[x12]\n" ".inst 0xc086047c // mova { z28.s-z31.s }, za3h.s[x12]\n" - ".inst 0xa042c568 // ld1w { z8.s-z11.s }, pn9.b/Z, [x11, #0x8, MUL VL]\n" - ".inst 0xa043c570 // ld1w { z16.s-z19.s }, pn9.b/Z, [x11, #0xc, MUL VL]\n" - ".inst 0xc0840680 // mova za0h.s[x12], { z20.s-z23.s }\n" + ".inst 0xa042c56c // ld1w { z12.s-z15.s }, pn9.b/Z, [x11, #0x8, MUL VL]\n" + ".inst 0xa043c568 // ld1w { z8.s-z11.s }, pn9.b/Z, [x11, #0xc, MUL VL]\n" + ".inst 0xc0840600 // mova za0h.s[x12], { z16.s-z19.s }\n" "addvl x11, x11, #16\n" - ".inst 0xc0840581 // mova za1h.s[x12], { z12.s-z15.s }\n" - ".inst 0xa060c540 // st1w { z0.s-z3.s }, pn9.b, [x10]\n" - ".inst 0xc0840502 // mova za2h.s[x12], { z8.s-z11.s }\n" + ".inst 0xc0840401 // mova za1h.s[x12], { z0.s-z3.s }\n" + ".inst 0xa060c554 // st1w { z20.s-z23.s }, pn9.b, [x10]\n" + ".inst 0xc0840582 // mova za2h.s[x12], { z12.s-z15.s }\n" ".inst 0xa061c558 // st1w { z24.s-z27.s }, pn9.b, [x10, #0x4, MUL VL]\n" - ".inst 0xc0840603 // mova za3h.s[x12], { z16.s-z19.s }\n" + ".inst 0xc0840503 // mova za3h.s[x12], { z8.s-z11.s }\n" "add x12, x12, #0x4\n" ".inst 0xa062c544 // st1w { z4.s-z7.s }, pn9.b, [x10, #0x8, MUL VL]\n" "cmp x12, x20\n" @@ -267,16 +268,16 @@ void sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL(const __fp16 *const A, c "mov x12, #0x0\n" "cntw x20\n" "13:" // Store to partial result buffer: Store only: Loop - ".inst 0xc0860400 // mova { z0.s-z3.s }, za0h.s[x12]\n" - ".inst 0xc0860428 // mova { z8.s-z11.s }, za1h.s[x12]\n" + ".inst 0xc0860408 // mova { z8.s-z11.s }, za0h.s[x12]\n" + ".inst 0xc0860424 // mova { z4.s-z7.s }, za1h.s[x12]\n" ".inst 0xc086044c // mova { z12.s-z15.s }, za2h.s[x12]\n" - ".inst 0xc0860464 // mova { z4.s-z7.s }, za3h.s[x12]\n" - ".inst 0xa060c540 // st1w { z0.s-z3.s }, pn9.b, [x10]\n" + ".inst 0xc0860470 // mova { z16.s-z19.s }, za3h.s[x12]\n" + ".inst 0xa060c548 // st1w { z8.s-z11.s }, pn9.b, [x10]\n" "add x12, x12, #0x4\n" - ".inst 0xa061c548 // st1w { z8.s-z11.s }, pn9.b, [x10, #0x4, MUL VL]\n" + ".inst 0xa061c544 // st1w { z4.s-z7.s }, pn9.b, [x10, #0x4, MUL VL]\n" "cmp x12, x20\n" ".inst 0xa062c54c // st1w { z12.s-z15.s }, pn9.b, [x10, #0x8, MUL VL]\n" - ".inst 0xa063c544 // st1w { z4.s-z7.s }, pn9.b, [x10, #0xc, MUL VL]\n" + ".inst 0xa063c550 // st1w { z16.s-z19.s }, pn9.b, [x10, #0xc, MUL VL]\n" "addvl x10, x10, #16\n" "blt 13b\n" "b 18f\n" @@ -284,22 +285,22 @@ void sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL(const __fp16 *const A, c "ldr x23, [%x[args], %[offsetof_C]]\n" "sub x22, x9, x28\n" "cntw x21\n" - "ld1rh { z17.h }, p0/Z, [%x[args], %[offsetof_KernelArgs_min]]\n" + "ld1rh { z21.h }, p0/Z, [%x[args], %[offsetof_KernelArgs_min]]\n" "ldr x20, [%x[args], %[offsetof_ldcb]]\n" ".inst 0x257a4770 // whilelt pn8.h, x27, x26, VLx2\n" "cmp x22, x21\n" - "ld1rh { z16.h }, p0/Z, [%x[args], %[offsetof_KernelArgs_max]]\n" + "ld1rh { z20.h }, p0/Z, [%x[args], %[offsetof_KernelArgs_max]]\n" "mov x12, #0x0\n" "csel x22, x22, x21, LT\n" "add x23, x23, x27, LSL #1\n" // C += n "madd x23, x28, x20, x23\n" // C += m * ldc "15:" // Store to output array: Accumulator loop - ".inst 0xc0060414 // mova { z20.b-z23.b }, za0h.b[x12, 0:3]\n" + ".inst 0xc0060410 // mova { z16.b-z19.b }, za0h.b[x12, 0:3]\n" "add x12, x12, #0x4\n" - ".inst 0xc120e28e // fcvt z14.h, { z20.s-z21.s }\n" - ".inst 0xc120e2cf // fcvt z15.h, { z22.s-z23.s }\n" + ".inst 0xc120e20e // fcvt z14.h, { z16.s-z17.s }\n" + ".inst 0xc120e24f // fcvt z15.h, { z18.s-z19.s }\n" "cmp x12, x22, LSL #2\n" - ".inst 0xc170c22e // fclamp { z14.h-z15.h }, z17.h, z16.h\n" + ".inst 0xc174c2ae // fclamp { z14.h-z15.h }, z21.h, z20.h\n" ".inst 0xa06022ee // st1h { z14.h-z15.h }, p8, [x23]\n" "add x23, x23, x20\n" "blt 15b\n" @@ -308,15 +309,15 @@ void sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL(const __fp16 *const A, c "mov x12, #0x0\n" "cntw x20\n" "17:" // Store to output array: Refill accumulators: Loop - ".inst 0xa040c578 // ld1w { z24.s-z27.s }, pn9.b/Z, [x11]\n" - ".inst 0xa041c574 // ld1w { z20.s-z23.s }, pn9.b/Z, [x11, #0x4, MUL VL]\n" - ".inst 0xa042c570 // ld1w { z16.s-z19.s }, pn9.b/Z, [x11, #0x8, MUL VL]\n" - ".inst 0xa043c57c // ld1w { z28.s-z31.s }, pn9.b/Z, [x11, #0xc, MUL VL]\n" - ".inst 0xc0840700 // mova za0h.s[x12], { z24.s-z27.s }\n" + ".inst 0xa040c574 // ld1w { z20.s-z23.s }, pn9.b/Z, [x11]\n" + ".inst 0xa041c564 // ld1w { z4.s-z7.s }, pn9.b/Z, [x11, #0x4, MUL VL]\n" + ".inst 0xa042c57c // ld1w { z28.s-z31.s }, pn9.b/Z, [x11, #0x8, MUL VL]\n" + ".inst 0xa043c56c // ld1w { z12.s-z15.s }, pn9.b/Z, [x11, #0xc, MUL VL]\n" + ".inst 0xc0840680 // mova za0h.s[x12], { z20.s-z23.s }\n" "addvl x11, x11, #16\n" - ".inst 0xc0840681 // mova za1h.s[x12], { z20.s-z23.s }\n" - ".inst 0xc0840602 // mova za2h.s[x12], { z16.s-z19.s }\n" - ".inst 0xc0840783 // mova za3h.s[x12], { z28.s-z31.s }\n" + ".inst 0xc0840481 // mova za1h.s[x12], { z4.s-z7.s }\n" + ".inst 0xc0840782 // mova za2h.s[x12], { z28.s-z31.s }\n" + ".inst 0xc0840583 // mova za3h.s[x12], { z12.s-z15.s }\n" "add x12, x12, #0x4\n" "cmp x12, x20\n" "blt 17b\n" @@ -338,4 +339,4 @@ void sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL(const __fp16 *const A, c } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SME2 |