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| author | Michalis Spyrou <michalis.spyrou@arm.com> | 2021-06-07 14:23:57 +0100 |
|---|---|---|
| committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2021-06-23 12:25:50 +0000 |
| commit | 20fca524baf99402f742ce38c538f2fd07d5fff9 (patch) | |
| tree | b63d98383d1ba22bb3ca59d393e4ab9d47a9c762 /src/core/common | |
| parent | 1d359279e22874121def2ce4bfdb633d94ea5ade (diff) | |
| download | ComputeLibrary-20fca524baf99402f742ce38c538f2fd07d5fff9.tar.gz | |
Create core library using high priority operators
A smaller core library is created using a subset of the operators.
Changed the structure of filelist.json in order to include more
information about the kernels and make the selection easier.
Resolves: COMPMID-4514
Change-Id: I079ca7d8e64346174eebdd13b834e1dd4dc36ca2
Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5786
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/core/common')
| -rw-r--r-- | src/core/common/Registrars.h | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/src/core/common/Registrars.h b/src/core/common/Registrars.h index 44ddf9808d..65f6c7093d 100644 --- a/src/core/common/Registrars.h +++ b/src/core/common/Registrars.h @@ -26,17 +26,17 @@ #if defined(ENABLE_FP16_KERNELS) -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #define REGISTER_FP16_SVE(func_name) &(func_name) -#else /* !defined(ENABLE_SVE) */ +#else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ #define REGISTER_FP16_SVE(func_name) nullptr -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ -#if defined(ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) +#if defined(ARM_COMPUTE_ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #define REGISTER_FP16_NEON(func_name) &(func_name) -#else /* !defined(ENABLE_NEON) */ +#else /* !defined(ARM_COMPUTE_ENABLE_NEON) */ #define REGISTER_FP16_NEON(func_name) nullptr -#endif /* defined(ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */ +#endif /* defined(ARM_COMPUTE_ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */ #else /* !defined(ENABLE_FP16_KERNELS) */ #define REGISTER_FP16_NEON(func_name) nullptr @@ -45,17 +45,17 @@ #if defined(ENABLE_FP32_KERNELS) -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #define REGISTER_FP32_SVE(func_name) &(func_name) -#else /* !defined(ENABLE_SVE) */ +#else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ #define REGISTER_FP32_SVE(func_name) nullptr -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ -#if defined(ENABLE_NEON) +#if defined(ARM_COMPUTE_ENABLE_NEON) #define REGISTER_FP32_NEON(func_name) &(func_name) -#else /* !defined(ENABLE_NEON) */ +#else /* !defined(ARM_COMPUTE_ENABLE_NEON) */ #define REGISTER_FP32_NEON(func_name) nullptr -#endif /* defined(ENABLE_NEON) */ +#endif /* defined(ARM_COMPUTE_ENABLE_NEON) */ #else /* defined(ENABLE_FP32_KERNELS) */ #define REGISTER_FP32_NEON(func_name) nullptr @@ -66,11 +66,11 @@ #define REGISTER_QASYMM8_SIGNED_NEON(func_name) &(func_name) -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #define REGISTER_QASYMM8_SIGNED_SVE(func_name) &(func_name) -#else /* !defined(ENABLE_SVE) */ +#else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ #define REGISTER_QASYMM8_SIGNED_SVE(func_name) nullptr -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ #else /* defined(ENABLE_QASYMM8_SIGNED_KERNELS) */ #define REGISTER_QASYMM8_SIGNED_NEON(func_name) nullptr @@ -80,11 +80,11 @@ #if defined(ENABLE_QASYMM8_KERNELS) #define REGISTER_QASYMM8_NEON(func_name) &(func_name) -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #define REGISTER_QASYMM8_SVE(func_name) &(func_name) -#else /* !defined(ENABLE_SVE) */ +#else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ #define REGISTER_QASYMM8_SVE(func_name) nullptr -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ #else /* defined(ENABLE_QASYMM8_KERNELS) */ #define REGISTER_QASYMM8_NEON(func_name) nullptr @@ -95,11 +95,11 @@ #define REGISTER_QSYMM16_NEON(func_name) &(func_name) -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #define REGISTER_QSYMM16_SVE(func_name) &(func_name) -#else /* !defined(ENABLE_SVE) */ +#else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ #define REGISTER_QSYMM16_SVE(func_name) nullptr -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ #else /* defined(ENABLE_QSYMM16_KERNELS) */ #define REGISTER_QSYMM16_NEON(func_name) nullptr @@ -108,17 +108,17 @@ #if defined(ENABLE_INTEGER_KERNELS) -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #define REGISTER_INTEGER_SVE(func_name) &(func_name) -#else /* !defined(ENABLE_SVE) */ +#else /* !defined(ARM_COMPUTE_ENABLE_SVE) */ #define REGISTER_INTEGER_SVE(func_name) nullptr -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ -#if defined(ENABLE_NEON) +#if defined(ARM_COMPUTE_ENABLE_NEON) #define REGISTER_INTEGER_NEON(func_name) &(func_name) -#else /* !defined(ENABLE_NEON) */ +#else /* !defined(ARM_COMPUTE_ENABLE_NEON) */ #define REGISTER_INTEGER_NEON(func_name) nullptr -#endif /* defined(ENABLE_NEON) */ +#endif /* defined(ARM_COMPUTE_ENABLE_NEON) */ #else /* defined(ENABLE_INTEGER_KERNELS) */ #define REGISTER_INTEGER_NEON(func_name) nullptr |