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author | Adnan AlSinan <adnan.alsinan@arm.com> | 2022-03-15 18:46:42 +0000 |
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committer | ramelg01 <ramy.elgammal@arm.com> | 2022-04-01 16:00:07 +0100 |
commit | 171fc3d160736e10f859c6f2a24d1c7a59bcd9e3 (patch) | |
tree | 8dcfee70ac949cbbc555bc7d42b38e53aa49ca99 /arm_compute/runtime/CL | |
parent | 892b70a8bb338f0c10c06112c41f6c8e8c3495f9 (diff) | |
download | ComputeLibrary-171fc3d160736e10f859c6f2a24d1c7a59bcd9e3.tar.gz |
Add CPU Pool3d FP16/32 implementation
- Add implementation for the CPU pooling 3d layer.
- NDHWC data layout support
- Support FP32/FP16.
- Add Pool3d to the operator list.
- Fix CL Pool3d kernel comments to generate the operator list.
Resolves: COMPMID-4671
Signed-off-by: Adnan AlSinan <adnan.alsinan@arm.com>
Change-Id: I92478a154beb12541525b648ed3dd5a58c8f27fa
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7311
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
(cherry picked from commit 572659a0e5dd1086b1c7d16fe331ff73d2acd93a)
Diffstat (limited to 'arm_compute/runtime/CL')
-rw-r--r-- | arm_compute/runtime/CL/functions/CLPooling3dLayer.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arm_compute/runtime/CL/functions/CLPooling3dLayer.h b/arm_compute/runtime/CL/functions/CLPooling3dLayer.h index 2e4823756d..8bad449c6f 100644 --- a/arm_compute/runtime/CL/functions/CLPooling3dLayer.h +++ b/arm_compute/runtime/CL/functions/CLPooling3dLayer.h @@ -54,7 +54,7 @@ public: CLPooling3dLayer &operator=(CLPooling3dLayer &&) = default; /** Set the input and output tensors. * - * Valid data layout: + * Valid data layouts: * - NDHWC * * Valid data type configurations: |