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| author | Luca Foschiani <luca.foschiani@arm.com> | 2020-01-28 10:38:07 +0000 |
|---|---|---|
| committer | Luca Foschiani <luca.foschiani@arm.com> | 2020-02-26 09:39:08 +0000 |
| commit | ee939fb58e3fc50ae7c92c895f8abd1dd9f20eb3 (patch) | |
| tree | fd199008e32f95390270010cf3d449745abae3b8 /arm_compute/core/NEON/kernels/NEReductionOperationKernel.h | |
| parent | ca8c0f79a9fc1b3056c574bdd134748ea3cfd885 (diff) | |
| download | ComputeLibrary-ee939fb58e3fc50ae7c92c895f8abd1dd9f20eb3.tar.gz | |
COMPMID-2774: Add support for QASYMM8_SIGNED in NEReductionOperation, NEReduceMean and NEArgMinMaxLayer
Signed-off-by: Luca Foschiani <luca.foschiani@arm.com>
Change-Id: Icf198a983c8ce2c6cd8451a1190bb99115eac3af
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/2652
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'arm_compute/core/NEON/kernels/NEReductionOperationKernel.h')
| -rw-r--r-- | arm_compute/core/NEON/kernels/NEReductionOperationKernel.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arm_compute/core/NEON/kernels/NEReductionOperationKernel.h b/arm_compute/core/NEON/kernels/NEReductionOperationKernel.h index 36792abee3..28cca4987b 100644 --- a/arm_compute/core/NEON/kernels/NEReductionOperationKernel.h +++ b/arm_compute/core/NEON/kernels/NEReductionOperationKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019 ARM Limited. + * Copyright (c) 2017-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -59,7 +59,7 @@ public: /** Set the source, destination of the kernel * - * @param[in] input Source tensor. Data type supported: QASYMM8/F16/F32. Data layouts supported: NCHW. + * @param[in] input Source tensor. Data type supported: QASYMM8_SIGNED/QASYMM8/F16/F32. Data layouts supported: NCHW. * @param[out] output Destination tensor.Data types and data layouts supported: same as @p input, S32 for ARG_MIX/ARG_MAX. * Output will have the same number of dimensions as input. * @param[in] axis Axis along which to reduce. Supported reduction axis : 0 @@ -69,7 +69,7 @@ public: /** Static function to check if given info will lead to a valid configuration of @ref NEReductionOperationKernel. * - * @param[in] input Source tensor info. Data type supported: QASYMM8/F16/F32. Data layouts supported: NCHW. + * @param[in] input Source tensor info. Data type supported: QASYMM8_SIGNED/QASYMM8/F16/F32. Data layouts supported: NCHW. * @param[in] output Destination tensor info.Data types and data layouts supported: same as @p input, S32 for ARG_MIX/ARG_MAX. * Output will have the same number of dimensions as input. * @param[in] axis Axis along which to reduce. Supported reduction axis : 0 |