diff options
author | Georgios Pinitas <georgios.pinitas@arm.com> | 2021-05-17 02:05:06 +0100 |
---|---|---|
committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2021-05-17 18:42:25 +0000 |
commit | 93f19950cf8db1f1c7795fbfb12e7a226646ddf9 (patch) | |
tree | afbb050361b7c59473ce55aa6916ae70ac87276a | |
parent | bdd16d1c4832ed416f24908b2c1d060aa4e42f32 (diff) | |
download | ComputeLibrary-93f19950cf8db1f1c7795fbfb12e7a226646ddf9.tar.gz |
Update CPU identification codes
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: Ic2cd0e46757af2ad7d0b3d733857ba9fdf860864
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5653
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
-rw-r--r-- | README.md | 1 | ||||
-rw-r--r-- | src/runtime/CPUUtils.cpp | 19 |
2 files changed, 14 insertions, 6 deletions
@@ -35,6 +35,7 @@ Binaries available at https://github.com/ARM-software/ComputeLibrary/releases. - Arm® Cortex®-A processor family using Arm® Neon™ technology - Arm® Cortex®-R processor family with Armv8-R AArch64 architecture using Arm® Neon™ technology - Arm® Cortex®-X1 processor using Arm® Neon™ technology + - Arm® Neoverse™-N1 processor using Arm® Neon™ technology - Arm® Mali™ GPUs: - Arm® Mali™-G processor family diff --git a/src/runtime/CPUUtils.cpp b/src/runtime/CPUUtils.cpp index 8117273b05..2bcba72f77 100644 --- a/src/runtime/CPUUtils.cpp +++ b/src/runtime/CPUUtils.cpp @@ -141,9 +141,6 @@ CPUModel midr_to_model(const unsigned int midr) model = CPUModel::A55r0; } break; - case 0xd44: // X1 - model = CPUModel::X1; - break; case 0xd09: // A73 model = CPUModel::A73; break; @@ -157,12 +154,16 @@ CPUModel midr_to_model(const unsigned int midr) model = CPUModel::GENERIC_FP16; } break; + case 0xd06: // A65 case 0xd0b: // A76 - case 0xd06: - case 0xd0c: - case 0xd0d: + case 0xd0c: // N1 + case 0xd0d: // A77 + case 0xd41: // A78 model = CPUModel::GENERIC_FP16_DOT; break; + case 0xd44: // X1 + model = CPUModel::X1; + break; case 0xd46: model = CPUModel::KLEIN; break; @@ -189,6 +190,12 @@ CPUModel midr_to_model(const unsigned int midr) // Only CPUs we have code paths for are detected. All other CPUs can be safely classed as "GENERIC" switch(cpunum) { + case 0x800: // A73 + model = CPUModel::A73; + break; + case 0x801: // A53 + model = CPUModel::A53; + break; case 0x803: // A55r0 model = CPUModel::A55r0; break; |